PI74ALVCHR16269V Pericom Semiconductor, PI74ALVCHR16269V Datasheet

PI74ALVCHR16269V

Manufacturer Part Number

PI74ALVCHR16269V

Description

Manufacturer

Pericom Semiconductor

Datasheet

1.PI74ALVCHR16269V.pdf (6 pages)

Specifications of PI74ALVCHR16269V

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Product Features

· Designed for low voltage operation

· V

· Hysteresis on all inputs

· Typical V

· All output ports have equivalent 26W series resistors,

· Bus Hold retains last active bus state during 3-State,

· Industrial operation at –40°C to +85°C

· Packages available:

Logic Block Diagram

no external resistors are required

eliminating the need for external pullup resistors

– 56-pin 240 mil wide plastic TSSOP (A)

< 0.8V at V

< 2.0V at V

= 2.3V to 3.6V

06-0154

OHV

OLP

(Output Ground Bounce)

(Output V

= 3.3V, T

= 25°C

Undershoot)

12-Bit to 24-Bit Registered Bus Exchanger

Product Description

The PI7ALVCHR16269 is used in applications in which two separate

ports must be multiplexed onto, or demultiplexed from, a single port. It

is particularly suitable as an interface between synchronous DRAM’s

and high-speed microprocessors.

Data is stored on the internal B-port registers on the low-to-high

transition of the clock (CLK) input when the appropriate clock-enable

(CLKENA) inputs are low. Proper control of these inputs allows two

sequential 12-bit words to be presented as a 24-bit word on the B-port.

For data transfer in the B-to-A direction, a single storage register is

provided. The select (SEL) line selects 1B or 2B data for the A outputs.

The register on the A output permits the fastest possible data transfer,

thus extending the period during which the data is valid on the bus. The

control terminals are registered so that all transactions are synchronous

with CLK. Data flow is controlled by the active-low output enables

(OEA, OEB1, and OEB2).

To ensure the high-impedance state during power up or power down,

a clock pulse should be applied as soon as possible and OE should

be tied to V

resistor is determined by the current-sinking capability of the driver.

Due to OE being routed through a register, the active state of the

outputs cannot be determined prior to the arrival of the first clock

pulse.

Active bus-hold circuitry is provided to hold unused or floating data

inputs at a valid logic level.

All outputs are designed to sink up to 12mA and include 26-ohm

resistors to reduce overshoot and undershoot.

through a pullup resistor; the minimum value of the

PI74ALVCHR16269

with 3-State Outputs

PS8372A

05/30/06

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PI74ALVCHR16269V Summary of contents

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... Packaging Mechanical Ordering Information Notes: • Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ • Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 06-0154 PI74ALVCHR16269 12-Bit to 24-Bit Registered Bus Exchanger with 3-State Outputs PS8372A 05/30/06 ...

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