NQ80331M667 S L828 Intel, NQ80331M667 S L828 Datasheet - Page 12

• Manufacturer Part Number: NQ80331M667 S L828
• Manufacturer: Intel

Specifications of NQ80331M667 S L828

• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Intel
Summary Table of Changes
Non-Core Errata (Sheet 3 of 3)
12
No.
53
54
55
56
57
58
59
60
61
62
63
®
80331 I/O Processor
A-1
X
X
X
X
X
X
X
X
X
X
B-0
X
X
X
X
X
X
X
X
X
X
Steppings
C-0
X
X
X
X
X
X
X
X
X
X
C-1
X
X
X
X
X
X
X
X
X
X
D-0
X
X
X
X
X
X
X
X
X
X
D-1
X
X
X
X
X
X
X
X
X
Page
38
38
39
39
39
39
40
41
41
41
41
Status
No Fix
No Fix
No Fix
No Fix
No Fix
No Fix
No Fix
No Fix
No Fix
Fixed
Fixed
PCI-to-PCI read flow-through with destination TRDY# stalls
can cause data corruption
S_PCIXCAP PCI mode threshold is too high
No support for burst I/O and configuration read/writes
Read flow through hangs due to disconnect without data at
a buffer boundary.
P_SERR# not asserted for parity error on AD[63:32]
Bus Interface Unit (BIU) claims DAC addresses in the
range of the Memory Mapped Registers (MMR
PCIX-to-PCI Memory Read issued as 32-bit, then retried as
64-bit
Tc1(min) of the PCI-X clock observed to be marginally less
than the requirement specified for the PCI-X (Mode 1,
class1) clock jitter.
I2C Control Register reset bit does not function
Internal Clock Misalignment Can Cause Processor Hang.
Spurious DMA0 End-Of-Transfer Interrupt
Errata
Specification Update