LTC2908ITS8-C1#PBF Linear Technology, LTC2908ITS8-C1#PBF Datasheet - Page 10
![](/photos/31/32/313269/296-sot-23-8_sml.jpg)
LTC2908ITS8-C1#PBF
Manufacturer Part Number
LTC2908ITS8-C1#PBF
Description
Manufacturer
Linear Technology
Datasheet
1.LTC2908ITS8-C1PBF.pdf
(16 pages)
Specifications of LTC2908ITS8-C1#PBF
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LTC2908
Supply Monitoring
The LTC2908 is a low power, high accuracy, six input
supply monitoring circuit with two adjustable inputs. The
reset delay is set to a nominal of 200ms with an internal
capacitor, eliminating the need for an external timing
capacitor.
All input voltages must be above predetermined thresholds
for the reset not to be invoked. The LTC2908 asserts the
reset output during power-up, power-down and brownout
conditions on any one of the voltage inputs.
Ultralow Voltage Pull-Down on RST
The LTC2908 issues a logic low on the RST output when
any one of the inputs falls below its threshold. Ideally, the
RST logic output would remain low with the input supply
voltage down to zero volts. Most supervisors lack pull-
down capability below 1V.
The LTC2908 power supply supervisor incorporates a
novel low voltage pull-down circuit that can hold the RST
line low with as little as 200mV of input supply voltage on
V1 and/or V2 (see Figures 1 and 2). The pull-down circuit
helps maintain a low impedance path to ground, reducing
the risk of the RST node from fl oating to an indeterminate
voltage.
APPLICATIONS INFORMATION
10
0.001
0.01
0.1
Figure 1. RST Pull-Down Current vs
Supply Voltage with 2 Inputs LTC2908-A1/
LTC2908-B1
10
1
0
V
V3 = V4 = V
CC
= V1 = V2
0.2
SUPPLY VOLTAGE, V
ADJ1
0.4
= V
RST AT 150mV
ADJ2
RST AT 50mV
= GND
0.6
CC
(V)
0.8
2908 G16
1
Such an indeterminate voltage may trigger external logic
causing erroneous reset operation(s). Furthermore, a
mid-scale voltage level could cause external circuits to
operate in the middle of their voltage transfer character-
istic, consuming more quiescent current than normal.
These conditions could cause serious system reliability
problems.
Power-Up
During power-up, RST starts asserting low as soon as
there is at least 200mV on V1 and/or V2. The RST pull-
down capability is a function of V1 and V2 as shown in
the Typical Performance Characteristics.
The greater of V1, V2 is the internal supply voltage (V
that powers the other internal circuitry. Once all the V
inputs rise above their thresholds, an internal timer is
started. After the internal timer counts a 200ms delay
time, RST weakly pulls high to V
Power-Down
On power-down, once any of the V
their threshold, RST asserts logic low. V
guarantees a logic low of 0.15V at RST.
0.001
0.01
0.1
10
1
Figure 2. RST Pull-Down Current vs
Supply Voltage with 1 Input
0
V
V2 = V3 = V4 = V
V
CC
ADJ3
= V1
= V
0.2
SUPPLY VOLTAGE, V
ADJ4
RST AT 150mV
= V
0.4
ADJ1
ADJ5
RST AT 50mV
= V
= GND
ADJ2
0.6
CC
CC
=
(V)
.
X
0.8
inputs drop below
CC
2908 G17
of at least 0.5V
1
2908fc
CC
X
)