CAT5401WI-00 ON Semiconductor, CAT5401WI-00 Datasheet - Page 10

CAT5401WI-00

Manufacturer Part Number
CAT5401WI-00
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT5401WI-00

Number Of Elements
4
# Of Taps
64
Resistance (max)
100KOhm
Power Supply Requirement
Single
Interface Type
Serial (SPI)
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
6V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
24
Package Type
SOIC W
Lead Free Status / Rohs Status
Compliant
illustrated in Figure 7. These three−byte instructions
exchange data between the WCR and one of the Data
Registers. The WCR controls the position of the wiper. The
response of the wiper to this action will be delayed by t
A transfer from the WCR (current wiper position), to a Data
Register is a write to non−volatile memory and takes a
minimum of t
between one of the four potentiometers and one of its
associated registers; or the transfer can occur between all
potentiometers and one associated register.
complete, as illustrated in Figure 6. These instructions
transfer data between the host/processor and the CAT5401;
either between the host and one of the data registers or
directly between the host and the Wiper Control Register.
These instructions are:
The basic sequence of the three byte instructions is
Four instructions require a two−byte sequence to
XFR Data Register to Wiper Control Register
This transfers the contents of one specified Data
Register to the associated Wiper Control Register.
XFR Wiper Control Register to Data Register
This transfers the contents of the specified Wiper
SI
SI
ID3 ID2 ID1 ID0
ID3 ID2 ID1 ID0
WR
0
0
Device ID
Device ID
to complete. The transfer can occur
1
1
SI
0
0
1
1
A3
ID3 ID2 ID1 ID0
0
A3
0
0
Figure 8. Increment/Decrement Instruction Sequence
Device ID
A2 A1 A0
Address
Internal
0
Address
Internal
A2 A1 A0
1
0
Figure 7. Three−Byte Instruction Sequence
Figure 6. Two−Byte Instruction Sequence
0
1
I3
A3
0
Instruction
I3
Opcode
A2
Address
I2 I1
Internal
Instruction
0
http://onsemi.com
Opcode
WRL
I2
A1
I1
.
I0 R1 R0
A0
10
Register
Address
I0
Data
I3
Increment/Decrement Command
The Increment/Decrement command is different from the
other commands. Once the command is issued the master
can clock the selected wiper up and/or down in one segment
steps; thereby providing a fine tuning capability to the host.
For each SCK clock pulse (t
selected wiper will move one resistor segment towards the
R
is LOW, the selected wiper will move one resistor segment
towards the R
Instruction
Register
Address
Opcode
R1
H
Data
The final command is Increment/Decrement (Figure 8).
See Instructions format for more detail.
Control Register to the specified associated Data
Register.
Gang XFR Data Register to Wiper Control Register
This transfers the contents of all specified Data
Registers to the associated Wiper Control Registers.
Gang XFR Wiper Counter Register to Data Register
This transfers the contents of all Wiper Control
Registers to the specified associated Data Registers.
I2 I1 I0
terminal. Similarly, for each SCK clock pulse while SI
Pot/WCR
Address
P1 P0
R0 P1 P0
Pot/WCR
Address
D7 D6 D5 D4 D3 D2 D1 D0
Register
Address
R1 R0 P1
L
terminal.
N
C
1
I
Data Register D[7:0]
Pot/WCR
Address
N
C
2
I
WCR[7:0]
P0
or
HIGH
N
C
n
I
) while SI is HIGH, the
D
E
C
1
D
E
C
n

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