LMX2313UEVAL National Semiconductor, LMX2313UEVAL Datasheet - Page 4

• Manufacturer Part Number: LMX2313UEVAL
• Manufacturer: National Semiconductor

Specifications of LMX2313UEVAL

• Lead Free Status / Rohs Status: Not Compliant

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Pin Descriptions
Pin Number
11
12
13
14
15
16
17
18
19
20
Pin Name
NC
Data
LE
GND
CE
V
NC
V
FL
V
µC
CC
P
(Continued)
I/O
— No Connect.
— Digital ground.
— Power supply for MICROWIRE
— No Connect.
— Power supply voltage input. Input may
— Power supply for charge pump. Must be ≥
O Fastlock mode output. In Fastlock mode
I High impedance CMOS Data input. Serial
I High impedance CMOS LE input. When
I High impedance CMOS Chip Enable
Data is entered MSB first. The last two
bits are the address for the target
registers. The Data is internally referenced
to V
Latch Enable goes HIGH, data stored in
the 22-bit shift register is loaded into one
the 3 control registers, based on the
address field. The Latch Enable is
internally referenced to V
input. Provides logical power-down control
of the device. Pull-up to V
The Chip Enable is internally referenced
to V
Must be ≤ V
same supply level as microprocessor or
baseband controller to enable
programming at low voltages.
range from 2.7V to 5.5V. Bypass
capacitors should be placed as close as
possible to this pin and be connected
directly to the ground plane.
this pin is at logic low. When not in
Fastlock mode, this pin is in TRI-STATE
mode. This pin can also be forced to
TRI-STATE, forced low or forced high by
the programming of the first two-bits of the
Timeout Counter.
V
CC
.
µC
µC
.
.
CC
. Typically connected to
Description
4
µC
µC
.
if unused.
™
circuitry.
I/O Circuit Configuration