DS25BR440TSQ National Semiconductor, DS25BR440TSQ Datasheet - Page 3

• Manufacturer Part Number: DS25BR440TSQ
• Manufacturer: National Semiconductor

Specifications of DS25BR440TSQ

• Number Of Elements: 4
• Number Of Receivers: 4
• Number Of Drivers: 4
• Input Type: CMOS
• Operating Supply Voltage (typ): 3.3V
• Differential Input High Threshold Voltage: 100mV
• Diff. Input Low Threshold Volt: -100mV
• Output Type: Repeater
• Differential Output Voltage: 450mV
• Transmission Data Rate: 3125Mbps
• Propagation Delay Time: 0.6ns
• Power Dissipation: 2.44W
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 40
• Lead Free Status / Rohs Status: Not Compliant

Pin Descriptions
Pin Name
IN0+, IN0- ,
IN1+, IN1-,
IN2+, IN2-,
IN3+, IN3-
OUT0+, OUT0-,
OUT1+, OUT1-,
OUT2+, OUT2-,
OUT3+, OUT3-
EQ0, EQ1,
EQ2, EQ3
PE0, PE1,
PE2, PE3
PWDN0,
PWDN1,
PWDN2,
PWDN3
LOS0, LOS1,
LOS2, LOS3
NC
PWDN
VDD
GND
Pin
Number
1, 2,
4, 5,
6, 7,
9, 10
29, 28,
27, 26,
24, 23,
22, 21
40, 39,
11, 12
31, 20,
19, 18
35,
34,
33,
32
14, 37,
36, 13
17
38
3, 8,
15,25, 30
16, DAP
I/O, Type
I, LVDS
O, LVDS
I, LVCMOS
I, LVCMOS
I, LVCMOS
O, LVCMOS
NC
I, LVCMOS
Power
Power
Pin Description
Inverting and non-inverting high speed LVDS input pins.
Inverting and non-inverting high speed LVDS output pins.
Receive equalization level select pins.
Transmit pre-emphasis level select pins.
Channel output power down pins. When the PWDNn is set to L,
the channel output OUTn is in the power down mode. The LOS
circuitry on the corresponding input remains enabled.
Loss Of Signal output pins, LOSn report when an open input fault
condition is detected at the input, INn. These are open drain
outputs. External pull up resistors are required.
NO CONNECT pins. May be left floating.
Device power down pin. When the PWDN is set to L, the device
is in the power down mode. The LOS circuitry is disabled as well.
Power supply pins.
Ground pin and a pad (DAP - die attach pad).
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