PI74ALVCH16269VX Pericom Semiconductor, PI74ALVCH16269VX Datasheet
![no-image](/images/manufacturer_photos/0/5/521/pericom_semiconductor_sml.jpg)
PI74ALVCH16269VX
Manufacturer Part Number
PI74ALVCH16269VX
Description
Manufacturer
Pericom Semiconductor
Datasheet
1.PI74ALVCH16269VX.pdf
(7 pages)
Specifications of PI74ALVCH16269VX
Lead Free Status / Rohs Status
Not Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Product Features
Logic Block Diagram
– 56-pin 300 mil wide plastic SSOP (V)
Designed for low voltage operation
V
Hysteresis on all inputs
Typical V
< 0.8V at V
Typical V
Bus Hold retains last active bus state during 3-state
eliminates the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
< 2.0V at V
CC
= 2.3V to 3.6V
06-0127
OLP
OHV
CC
CC
(Output Ground Bounce)
= 3.3V, T
= 3.3V, T
(Output V
A
A
OH
= 25°C
= 25°C
Undershoot)
1
Product Description
The PI7ALVCH16269 is used in applications in which two separate
ports must be multiplexed onto, or demultiplexed from, a single port. It
is particularly suitable as an interface between synchronous DRAM’s
and high-speed microprocessors.
Data is stored on the internal B-port registers on the low-to-high
transition of the clock (CLK) input when the appropriate clock-enable
(CLKENA) inputs are low. Proper control of these inputs allows two
sequential 12-bit words to be presented as a 24-bit word on the B-port.
For data transfer in the B-to-A direction, a single storage register is
provided. The select (SEL) line selects 1B or 2B data for the A outputs.
The register on the A output permits the fastest possible data transfer,
thus extending the period during which the data is valid on the bus. The
control terminals are registered so that all transactions are synchronous
with CLK. Data flow is controlled by the active-low output enables
(OEA, OEB1, and OEB2).
To ensure the high-impedance state during power up or power
down, a clock pulse should be applied as soon as possible and OE
should be tied to V
of the resistor is determined by the current-sinking capability of the
driver. Because OE is being routed through a register, the active
state of the outputs cannot be determined prior to the arrival of the
first clock pulse.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
12-Bit to 24-Bit Registered Bus Exchanger
CC
through a pullup resistor; the minimum value
PI74ALVCH16269
with 3-State Outputs
PS8379A 05/24/06
Related parts for PI74ALVCH16269VX
PI74ALVCH16269VX Summary of contents
Page 1
...
Page 2
...
Page 3
...
Page 4
...
Page 5
...
Page 6
...
Page 7
... Ordering Code PI74ALVCH16269A PI74ALVCH16269V Notes: • Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ • Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 06-0127 Package Code A 56-pin 240 mil wide plastic TSSOP (A) V 56-pin 300 mil wide plastic SSOP (V) ...