MT48LC2M32B2B5-7 IT:G Micron Technology Inc, MT48LC2M32B2B5-7 IT:G Datasheet - Page 31

• Manufacturer Part Number: MT48LC2M32B2B5-7 IT:G
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC2M32B2B5-7 IT:G

• Organization: 2Mx32
• Density: 64Mb
• Address Bus: 13b
• Access Time (max): 17/8/5.5ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 160mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

Figure 19:
Figure 20:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Random WRITE Cycles
WRITE-to-READ
Note:
In the case of a fixed-length burst being executed to completion, a PRECHARGE
command issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvan-
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length or full-page bursts.
COMMAND
COMMAND
ADDRESS
ADDRESS
Each WRITE command may be to any bank. DQM is LOW.
CLK
CLK
DQ
DQ
WRITE
BANK,
BANK,
WRITE
COL n
COL n
D
T0
D
T0
n
IN
n
IN
WRITE
BANK,
n + 1
COL a
NOP
T1
D
T1
D
a
IN
IN
TRANSITIONING DATA
31
BANK,
WRITE
COL x
BANK,
COL b
READ
T2
D
T2
x
IN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WRITE
BANK,
COL m
T3
T3
NOP
D
m
IN
DON’T CARE
NOP
D
T4
OUT
b
DON’T CARE
NOP
b + 1
T5
D
OUT
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
Commands