BOXDP965LTCK Intel, BOXDP965LTCK Datasheet - Page 46

• Manufacturer Part Number: BOXDP965LTCK
• Manufacturer: Intel

Specifications of BOXDP965LTCK

• Lead Free Status / Rohs Status: Compliant

Intel Desktop Board DP965LT Technical Product Specification
2.3
46
Table 12. I/O Map
Notes:
1.
2.
3.
Some additional I/O addresses are not available due to ICH8 address aliassing. The
ICH8 data sheet provides more information on address aliassing.
NOTE
0228 - 022F
04D0 - 04D1
Address (hex)
0000 - 00FF
01F0 - 01F7
0278 - 027F
02E8 - 02EF
02F8 - 02FF
0378 - 037F
03B0 - 03BB
03C0 - 03DF
03E8 - 03EF
03F0 - 03F5
03F4 - 03F7
03F8 - 03FF
LPTn + 400
0CF8 - 0CFB
0CF9
0CFC - 0CFF
FFA0 - FFA7
For information about
Obtaining the ICH8 data sheet
Default, but can be changed to another address range
Dword access only
Byte access only
Fixed I/O Map
(Note 3)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 2)
Size
256 bytes
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
12 bytes
32 bytes
8 bytes
6 bytes
4 bytes
8 bytes
2 bytes
8 bytes
4 bytes
1 byte
4 bytes
8 bytes
Used by the Desktop Board DP965LT. Refer to the ICH8 data
Primary Parallel ATE IDE channel command block
Primary Parallel ATA IDE channel control block
Edge/level triggered PIC
Description
sheet for dynamic addressing information.
LPT3
LPT2
COM4
COM2
LPT1
Intel 82P965 MCH
Intel 82P965 MCH
COM3
Diskette channel
COM1
ECP port, LPTn base address + 400h
PCI configuration address register
Reset control register
PCI configuration data register
Primary Parallel ATA IDE bus master registers
Refer to
Section 1.2 on page 17