LQ281L1LW11 Sharp Electronics, LQ281L1LW11 Datasheet - Page 6

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LQ281L1LW11

Manufacturer Part Number
LQ281L1LW11
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LQ281L1LW11

Lead Free Status / Rohs Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LQ281L1LW11
Manufacturer:
SHARP
Quantity:
1 000
4. Input Terminals and their function
4-1. Interface signals
CN1(A area), CN2(B area), CN3(C area), CN4(D area) in Fig.1
Using connector
Mating connector
Using LVDS Receiver
Pin Diagrams(CN1 - CN4)
Pin arrangement is shown in Fig.5
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
RxBCLKIN+
RxBCLKIN−
RxACLKIN+
RxACLKIN−
RxAIN3+
RxAIN3−
RxAIN2+
RxAIN2−
RxAIN1+
RxAIN1−
RxAIN0+
RxAIN0−
RxBIN3+
RxBIN3−
RxBIN2+
RxBIN2−
RxBIN1+
RxBIN1−
RxBIN0+
RxBIN0−
Symbol
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
: 10240-1210VE (3M)
: 10140-□□□□○○ (3M)
: DS90CF386(National Semiconductor Corp.) or THC63LVDF84B(Thine)
Negative (−) LVDS differential data input CH3(B port)
Negative (−) LVDS differential data input CH2(B port)
Negative (−) LVDS differential data input CH1(B port)
Negative (−) LVDS differential data input CH0(B port)
Negative (−) LVDS differential data input CH3(A port)
Negative (−) LVDS differential data input CH2(A port)
Negative (−) LVDS differential data input CH1(A port)
Negative (−) LVDS differential data input CH0(A port)
Positive (+) LVDS differential data input CH3(B port)
Positive (+) LVDS differential data input CH2(B port)
Positive (+) LVDS differential data input CH1(B port)
Positive (+) LVDS differential data input CH0(B port)
Positive (+) LVDS differential data input CH3(A port)
Positive (+) LVDS differential data input CH2(A port)
Positive (+) LVDS differential data input CH1(A port)
Positive (+) LVDS differential data input CH0(A port)
Negative (−) LVDS differential clock input (A port)
Negative (−) LVDS differential clock input (B port)
Positive (+) LVDS differential clock input (A port)
Positive (+) LVDS differential clock input (B port)
Function
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Remark
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
LD-15212B-3

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