EWIXP425BDT Intel, EWIXP425BDT Datasheet - Page 95
EWIXP425BDT
Manufacturer Part Number
EWIXP425BDT
Description
Manufacturer
Intel
Datasheet
1.EWIXP425BDT.pdf
(130 pages)
Specifications of EWIXP425BDT
Core Operating Frequency
533MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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Intel
Figure 22.
Table 52.
5.5.2.6
Figure 23.
Table 53.
August 2006
Document Number: 252479-006US
®
IXP42X product line and IXC1100 control plane processors
MDIO Input Timings
MDIO Timings Values
SDRAM Bus
SDRAM Input Timings
SDRAM Input Timings Values
Note:
Note:
1.
Symbol
Symbol
T
T
setup
Signals
hold
T1
T2
T3
T4
T5
Clock
PHY is sourcing MDIO.
This parameter is guaranteed by design but has not been 100% tested.
Input setup prior to rising edge of clock. Inputs
included in this timing are SDM_DQ[31:0]
(during a read operation).
Input hold time after the rising edge of the clock.
Inputs included in this timing are SDM_DQ[31:0]
(during a read operation).
ETH_MDIO, clock to output timing with respect to
rising edge of ETH_MDC clock
ETH_MDIO output hold timing after the rising
edge of ETH_MDC clock
ETH_MDIO input setup prior to rising edge of
ETH_MDC clock
ETH_MDIO hold time after the rising edge of
ETH_MDC clock
ETH_MDC clock period
ETH_MDC
ETH_MDIO
Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Parameter
Parameter
T setup
T 5
T 3
T hold
T 4
Min.
125
Min.
1.4
1.5
10
2
0
ETH_MDC/2
+ 10 ns
Max.
Max.
500
Units
Units
ns
ns
ns
ns
ns
ns
ns
Datasheet
A9583-02
Notes
4891-01
Notes
1
95
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