IXP2400 Intel, IXP2400 Datasheet - Page 64

• Manufacturer Part Number: IXP2400
• Manufacturer: Intel

Specifications of IXP2400

• Operating Supply Voltage (typ): 1.3/1.5/2.5/3.3V
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel
3.2.5
3.2.6
64
Table 24. SlowPort Signals
®
IXP2400 Network Processor
1. The PCI_RCOMP pin should be connected to ground through external a 24Ω ±1% resistor and one 0603 0.1 µF decoupling
SlowPort Signals
The SlowPort is used to interface to asynchronous devices. Typically this will be a Flash ROM
(Boot ROM) and maintenance port of MAC devices. See
1. SP_CLK can drive a maximum of two loads, 10 pF each.
GPIO Signals
GPIO are general-purpose IO signals. They can be used for slow-speed, software-controlled IO
such as LEDs and input switches. They are also tri-stated during reset to bring configuration
information into the IXP2400; this information is latched at the deassertion of reset. GPIOs use
LVTTL signalling (3.3V); see
SP_CLK
SP_WR_L
SP_RD_L
SP_AD[7:0]
SP_ACK_L
SP_CS_L[1:0]
SP_ALE_L
SP_CP_SP_A[0]
SP_OE_L
SP_DIR_SP_A[1]
Total (per channel)
capacitor. Place the resistor and capacitor as close to the IXP2400 as possible, within 1.0” of the package. The compensation
signal should be routed with as wide a trace as possible, minimum of 12 mils wide and isolated from other signals with a min-
imum of 10-mil spacing.
Signal Name
1
I/O
IO
O
O
O
O
O
O
O
O
I
This clock is used to time all the external SlowPort
transfers. It can be adjusted by the CCR register. The CCR
contains the clock divisor information. This clock is
generated by dividing the SHXP_APB_CLK.
Write strobe to indicate the write access to the PROM bus.
Read strobe to indicate the read access from the PROM
Bus.
Address and data multiplexed bidirectional tri-state bus.
Acknowledge signal responded by the PROM devices when
the transaction is complete.For special application, this pin
acts as interrupt input from the external device.
Device select signals to indicate which device will be
addressed.
Address latch enable signal to indicate the address is
placed in the PROM Bus.
Latches consecutive bytes onto external buffers. Used for
16,32-bit data bus device only. Also acts as an address [0]
signal during the mode 0 set in the protocol control register
for 8-bit device transaction.
Shifts the bytes out of the external buffers.
Controls the direction of the data transaction. For read, it is
asserted low; For write, it is asserted high. Also acts as an
address [1] signal during the mode 0 set in the protocol
control register for the 8-bit device transaction.
Table
25.
Description
Table
24.
Datasheet
Number
18
1
1
1
8
1
2
1
1
1
1