RPIXP2850BB Intel, RPIXP2850BB Datasheet - Page 102

• Manufacturer Part Number: RPIXP2850BB
• Manufacturer: Intel

Specifications of RPIXP2850BB

• Operating Supply Voltage (typ): 1.3/1.5/2.5/3.3V
• Operating Supply Voltage (max): 1.575/2.7/3.465V
• Operating Supply Voltage (min): 1.235/2.3/3.135V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

IXP28XX Network Processor
MSF (SPI-4/CSIX/FC)
Figure 58.
5.1.2
102
SPI-4 Clock Configuration for Dual Network Processors
1.
CSIX
CSIX-L1 (Common Switch Interface, Level 1) defines an interface between a Traffic Manager
(TM) and a Switch Fabric (SF) for ATM, IP, MPLS, and Ethernet, or similar data communication
applications.
The Network Processor Forum (NPF) controls the CSIX-L1 specification (available at
http://www.npforum.org and www.csix.org).
The unit of information transferred between Traffic Managers and Switch Fabrics is called a
CFrame, of which there are three categories:
The MSF automatically discards any Idle CFrames that it receives from the SF, and transmits Idle
CFrames to the SF when required. The MSF stores Data and Control CFrames in buffers during
transmit and receive operations. The buffers may be partitioned according to CFrame category —
guaranteeing that neither control nor data CFrames block each other.
There are two types of CSIX-L1 flow control:
Every CFrame Base Header contains a Ready Field, which contains two Link Level flow control
bits: one for Flow Control traffic and one for Data traffic. Due to the CSIX-L1 requirement for
bounded response to Link Level flow control, the MSF manages all Link Level flow control.
Virtual Output Queue Flow Control is carried in Flow Control CFrames. As with Data CFrames,
the MSF places Flow Control CFrames in internal buffers before passing them to the Microengines
for processing.
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Note that when chaining clocks the jitter accumulated from the MAC, PCB, and RCLK/TCLK_REF pins must be accounted
in addition to the duty-cycle distortion.
Data
Control (for example, flow control)
Idle
Link Level
Virtual Output Queue (VOQ)
MAC
RD CLK
IXP2800 #1
RCLK REF
TCLK REF
TD CLK
1
RD CLK
IXP2800 #2
RCLK REF
Hardware Design Guide
TCLK REF
TD CLK
A9317-01