AD7537KP Analog Devices Inc, AD7537KP Datasheet - Page 5

• Manufacturer Part Number: AD7537KP
• Description: IC DAC 12BIT LC2MOS DUAL 28-PLCC
• Manufacturer: Analog Devices Inc

Specifications of AD7537KP

• Rohs Status: RoHS non-compliant
• Settling Time: 250µs
• Number Of Bits: 12
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 24mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-LCC (J-Lead)

REV. 0
UNIPOLAR BINARY OPERATION
(2-QUADRANT MULTIPLICATION)
Figure 4 shows the circuit diagram for unipolar binary opera-
tion. With an ac input, the circuit performs 2-quadrant multipli-
cation. The code table for Figure 4 is given in Table II.
Operational amplifiers A1 and A2 can be in a single package
(AD644, AD712) or separate packages (AD544, AD711,
AD OP27). Capacitors C1 and C2 provide phase compensation
to help prevent overshoot and ringing when high-speed op amps
are used.
For zero offset adjustment, the appropriate DAC register is
loaded with all 0s and amplifier offset adjusted so that V
V
the DAC register with all 1s and adjusting R1 (R3) so that
V
eration, resistors and potentiometers should have a low Tem-
perature Coefficient. In many applications, because of the
excellent Gain T.C. and Gain Error specifications of the
AD7537, Gain Error trimming is not necessary. In fixed refer-
ence applications, full scale can also be adjusted by omitting R1,
R2, R3, R4 and trimming the reference voltage magnitude.
OUTB
OUTA
Binary Number in
DAC Register
MSB
1111 1111 1111
1000 0000 0000
0000 0000 0001
0000 0000 0000
is 0 V. Full-scale trimming is accomplished by loading
(V
Figure 4. AD7537 Unipolar Binary Operation
Table II. Unipolar Binary Code Table for
Circuit of Figure 4
OUTB
) = –V
LSB
IN
(4095/4096). For high temperature op-
Analog Output,
V
0 V
OUTA
V
V
V
IN
IN
IN
or V
4095
4096
2048
4096
4096
1
OUTB
1
2
V
IN
OUTA
or
–5–
BIPOLAR OPERATION
(4-QUADRANT MULTIPLICATION)
The recommended circuit diagram for bipolar operation is
shown in Figure 5. Offset binary coding is used.
With the appropriate DAC register loaded to 1000 0000 0000,
adjust R1 (R3) so that V
R2 (R3, R4) may be omitted and the ratios of R6, R7 (R9, 10)
varied for V
complished by adjusting the amplitude of V
value of R5 (R8).
If R1, R2 (R3, R4) are not used, then resistors R5, R6, R7 (R8,
R9, R10) should be ratio matched to 0.01% to ensure gain error
performance to the data sheet specification. When operating
over a wide temperature range, it is important that the resistors
be of the same type so that their temperature coefficients match.
The code table for Figure 5 is given in Table III.
Figure 5. Bipolar Operation (Offset Binary Coding)
Binary Number in
DAC Register
MSB
1111 1111 1111
1000 0000 0001
1000 0000 0000
0111 1111 1111
0000 0000 0000
Table III. Bipolar Code Table for Offset Binary
Circuit of Figure 5
OUTA
(V
LSB
OUTB
OUTA
) = 0 V. Full-scale trimming can be ac-
Applications–
(V
Analog Output,
V
0 V
OUTB
OUTA
V
V
V
V
IN
IN
IN
IN
) = 0 V. Alternatively, R1,
or V
2048
2048
2048
2048
2047
2048
1
1
IN
OUTB
or by varying the
AD7537
V
IN