LMX1600EVAL National Semiconductor, LMX1600EVAL Datasheet - Page 12

no-image

LMX1600EVAL

Manufacturer Part Number
LMX1600EVAL
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LMX1600EVAL

Lead Free Status / Rohs Status
Not Compliant
www.national.com
2.0 Programming Description
Note 16: See section 2.5.3 for AUX_R[14] description.
2.5.1 Lock Detect Digital Filter
The Lock Detect Digital Filter compares the difference between the phase of the inputs of the phase detector to a RC generated
delay of approximately 15 ns. To enter the locked state (Lock = HIGH) the phase error must be less than the 15 ns RC delay for
4 consecutive reference cycles. Once in lock (Lock = HIGH), the RC delay is changed to approximately 30 ns. To exit the locked
state (Lock = LOW), the phase error must become greater than the 30 ns RC delay. When the PLL is in the powerdown mode,
Lock is forced LOW. A flow chart of the digital filter is shown below.
0
0
1
1
1
1
1
1
0
0
1
1
FoLD
0
1
0
1
0
1
(Continued)
X
X
X
X
X
x
12
Main Programmable Counter Output
Aux Programmable Counter Output
Main Reference Counter Output
Aux Reference Counter Output
Main “and” Aux Lock Detect
Fo/LD OUTPUT STATE
Aux Lock Detect
10012916