MT46H16M32LFCM-75 Micron Technology Inc, MT46H16M32LFCM-75 Datasheet - Page 49

MT46H16M32LFCM-75

Manufacturer Part Number
MT46H16M32LFCM-75
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46H16M32LFCM-75

Organization
16Mx32
Density
512Mb
Address Bus
15b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
100mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant

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Figure 16: Initialize and Load Mode Registers
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
Command
BA0, BA1
Address
V
DQS
V
DDQ
CK#
CKE
A10
DM
DQ
CK
DD
1
LVCMOS
HIGH LEVEL
Power-up: V
Notes:
NOP 2
T = 200µs
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DD
1. PRE = PRECHARGE command; LMR = LOAD MODE REGISTER command; AR = AUTO RE-
2. NOP or DESELECT commands are required for at least 200μs.
3. Other valid commands are possible.
4. NOPs or DESELECTs are required during this time.
and CK stable
t
IS
FRESH command; ACT = ACTIVE command.
NOP
T0
High-Z
High-Z
t
IH
t
CH
t
CK
t
CL
All banks
t
IS
PRE
T1
t
IH
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RP
4
AR
Ta0
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512Mb: x16, x32 Mobile LPDDR SDRAM
4
Tb0
AR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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Load standard
mode register
4
t
t
t
Op-code
Op-code
BA0 = L,
IS
IS
IS
BA1 = L
Tc0
LMR
t
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IH
IH
IH
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Load extended
mode register
4
Op-code
Op-code
BA0 = L,
BA1 = H
LMR
Td0
© 2004 Micron Technology, Inc. All rights reserved.
t
MRD
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4
ACT
Te0
Row
Bank
Row
Initialization
3
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Don’t Care
NOP
Tf0
3

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