AD9705BCPZ Analog Devices Inc, AD9705BCPZ Datasheet - Page 14

• Manufacturer Part Number: AD9705BCPZ
• Description: IC DAC TX 10BIT 175MSPS 32-LFCSP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9705BCPZ

• Data Interface: Serial
• Settling Time: 11ns
• Number Of Bits: 10
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 50mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Resolution (bits): 10bit
• Sampling Rate: 175MSPS
• Input Channel Type: Parallel
• Supply Current: 5.1mA
• Digital Ic Case Style: CSP
• No. Of Pins: 32
• Number Of Channels: 1
• Resolution: 10b
• Interface Type: Parallel
• Single Supply Voltage (typ): 1.8/3.3V
• Dual Supply Voltage (typ): Not RequiredV
• Architecture: Segment
• Power Supply Requirement: Analog and Digital
• Output Type: Current
• Integral Nonlinearity Error: ±0.36LSB
• Single Supply Voltage (min): 1.7V
• Single Supply Voltage (max): 3.6V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: LFCSP EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9705-EBZ - BOARD EVAL FOR AD9705
• Lead Free Status / Rohs Status: Compliant

AD9704/AD9705/AD9706/AD9707
AD9704
Table 12. AD9704 Pin Function Descriptions
Pin No.
27
28 to 32, 1
2
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10, 26
4 to 9
3
CLKCOM
Mnemonic
DB7 (MSB)
DB6 to DB1
DB0 (LSB)
SLEEP/CSB
FS ADJ
REFIO
ACOM
IOUTA
IOUTB
OTCM
AVDD
PIN/SPI/RESET
MODE/SDIO
CMODE/SCLK
CLK−
CLK+
CLKVDD
DCOM
NC
DVDD
Description
Most Significant Data Bit (MSB).
Data Bit 6 to Data Bit 1.
Least Significant Data Bit (LSB).
In pin mode, active high powers down chip.
In SPI mode, this pin is the serial port chip select (active low).
Full-Scale Current Output Adjust.
Reference Input/Output. Serves as reference input when internal reference disabled. Serves as 1.0 V reference
output when internal reference is activated. Requires a 0.1 μF capacitor to ACOM when internal reference is
activated.
Analog Common.
DAC Current Output. Full-scale current is sourced when all data bits are 1s.
Complementary DAC Current Output. Full-scale current is sourced when all data bits are 0s.
Adjustable Output Common Mode. Refer to the Theory of Operation section for details.
Analog Supply Voltage (1.7 V to 3.6 V).
Selects SPI mode or pin mode operation. Active high for pin mode operation. Active low for SPI mode
operation. Pulse high to reset SPI registers to default values.
In pin mode, this selects the input data format. Connect to DCOM for straight binary, DVDD for twos
complement. In SPI mode, this pin acts as SPI data input/output.
In pin mode, this pin selects the clock input type. Connect to CLKCOM for single-ended clock receiver
(drive CLK+ and float CLK−). Connect to CLKVDD for differential receiver.
In SPI mode, this pin is the serial data clock input.
Clock Common.
Negative Differential Clock Input.
Positive Differential Clock Input.
Clock Supply Voltage (1.7 V to 3.6 V).
Digital Common.
No Connect.
Digital Supply Voltage (1.7 V to 3.6 V).
DB0 (LSB)
DVDD
NC = NO CONNECT
DB1
NC
NC
NC
NC
NC
Figure 6. AD9704 Pin Configuration
1
2
3
4
5
6
7
8
Rev. A | Page 14 of 52
(Not to Scale)
PIN 1
INDICATOR
AD9704
TOP VIEW
24
23
22
21
20
19
18
17
FS ADJ
REFIO
ACOM
IOUTA
IOUTB
OTCM
AVDD
PIN/SPI/RESET