AD7528JNZ Analog Devices Inc, AD7528JNZ Datasheet - Page 5

• Manufacturer Part Number: AD7528JNZ
• Description: IC DAC 8BIT DUAL MULTIPLY 20-DIP
• Manufacturer: Analog Devices Inc

Specifications of AD7528JNZ

• Settling Time: 400ns
• Number Of Bits: 8
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 450mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 20-DIP (0.300", 7.62mm)
• Resolution (bits): 8bit
• Sampling Rate: 5.6MSPS
• Input Channel Type: Parallel
• Supply Current: 2mA
• Digital Ic Case Style: DIP
• No. Of Pins: 20
• Data Interface: CMOS, Parallel, TTL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. B
INPUTS
DAC A/
DAC B
DGND
DATA
V
WR
DD
CS
DB0
DB7
INPUTS
DAC A/
DAC B
DGND
DATA
V
NOTES:
1
2
3
WR
DD
CS
R1, R2 AND R3, R4 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
SEE TABLE III FOR RECOMMENDED VALUES.
ADJUST R1 FOR V
ADJUST R3 FOR V
MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS
R6, R7 AND R9, R10.
C1, C2 PHASE COMPENSATION (10pF–15pF) MAY BE REQUIRED
IF A1/A3 IS A HIGH SPEED AMPLIFIER.
DB0
DB7
NOTES:
1
2
R1, R2 AND R3, R4 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
C1, C2 PHASE COMPENSATION (10pF–15pF) IS REQUIRED WHEN
SEE TABLE III FOR RECOMMENDED VALUES.
USING HIGH SPEED AMPLIFIERS TO PREVENT RINGING OR OSCILLATION.
CONTROL
BUFFER
INPUT
LOGIC
Figure 4. Dual DAC Unipolar Binary Operation
(2 Quadrant Multiplication); See Table I
Figure 5. Dual DAC Bipolar Operation
(4 Quadrant Multiplication); See Table II
CONTROL
BUFFER
INPUT
LOGIC
OUT
OUT
A = 0V WITH CODE 10000000 IN DAC A LATCH.
B = 0V WITH CODE 10000000 IN DAC B LATCH.
LATCH
LATCH
AD7528
LATCH
LATCH
AD7528
(± 10V)
V
(± 10V)
IN
DAC A
DAC B
V
IN
A
R1
B
R3
(± 10V)
V
1
(± 10V)
1
IN
DAC A
DAC B
V
IN
A
R1
B
R3
1
R
R
OUT A
OUT B
1
FB
AGND
FB
AGND
R2
R4
AGND
A
B
1
1
R
AGND
R
OUT A
OUT B
FB
FB
R2
R4
C1
C2
A
B
A1
A3
1
1
20k
10k
3
3
10k
20k
R10
R6
R7
R9
AGND
AGND
2
2
2
2
C1
C2
2
2
R12
5k
5k
AGND
AGND
R11
–5–
20k
20k
A2
A4
R5
R8
V
V
OUT
OUT
A
B
V
V
OUT
OUT
A
B
DAC Latch Contents
MSB
1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
Note: 1 LSB =
DAC Latch Contents Analog Output
MSB
1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
Note: 1 LSB =
Trim
Resistor
R1; R3
R2; R4
Table II. Bipolar (Offset Binary) Code Table
Table III. Recommended Trim Resistor
Values vs. Grade
Table I. Unipolar Binary Code Table
LSB
LSB
2
2
J/A/S
1 k
330
8
7
V
V
IN
IN
128
256
1
1
(DAC A or DAC B)
Analog Output
(DAC A or DAC B)
K/B/T
500
150
–V
–V
–V
–V
–V
–V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
0
–V
–V
–V
AD7528
V
256
129
256
128
127
256
256
256
255
256
IN
IN
IN
IN
1
0
127
128
128
127
128
128
128
1
L/C/U
200
82
0
V
2
IN