AD5620CRMZ-2 Analog Devices Inc, AD5620CRMZ-2 Datasheet - Page 7

IC DAC 12BIT SPI/SRL 8MSOP

AD5620CRMZ-2

Manufacturer Part Number
AD5620CRMZ-2
Description
IC DAC 12BIT SPI/SRL 8MSOP
Manufacturer
Analog Devices Inc
Series
nanoDAC™r
Datasheet

Specifications of AD5620CRMZ-2

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Design Resources
Single-Ended-to-Differential Converters for Voltage Output and Current Output DACs Using AD8042 (CN0143) Amplitude Control Circuit for AD9834 Waveform Generator (CN0156)
Settling Time
8µs
Number Of Bits
12
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
2.5mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Resolution (bits)
12bit
Sampling Rate
125kSPS
Input Channel Type
Serial
Supply Voltage Range - Analogue
2.7V To 3.3V, 4.5V To 5.5V
Supply Current
1mA
Digital Ic Case
RoHS Compliant
Number Of Channels
1
Resolution
12b
Conversion Rate
125KSPS
Interface Type
SER 3W SPI QSPI UW
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
±1+/- LSB
Single Supply Voltage (min)
4.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
MSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5620CRMZ-2
Manufacturer:
ADI
Quantity:
3 517
TIMING CHARACTERISTICS
All input signals are specified with tr = tf = 1 ns/V (10% to 90% of V
V
Table 4.
Parameter
t
t
t
t
t
t
t
t
t
t
1
1
2
3
4
5
6
7
8
9
10
Maximum SCLK frequency is 30 MHz at V
1
DD
= 2.7 V to 5.5 V; all specifications T
SYNC
SCLK
DIN
LSB = DB0
MSB = DB23 FOR AD5660
MSB = DB15 FOR AD5620/AD5640
V
50
13
13
13
5
4.5
0
50
13
0
DD
= 2.7 V to 3.6 V
t
8
t
10
MSB
DD
= 3.6 V to 5.5 V and 20 MHz at V
Limit at T
t
4
MIN
t
5
to T
t
6
MIN
V
33
13
13
13
5
4.5
0
33
13
0
MAX
DD
, T
, unless otherwise noted.
t
= 3.6 V to 5.5 V
MAX
3
Figure 2. Serial Write Operation
t
1
Rev. F | Page 7 of 28
t
2
DD
= 2.7 V to 3.6 V.
DD
LSB
) and timed from a voltage level of (V
t
7
t
9
ns min
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Conditions/Comments
SCLK cycle time
SCLK high time
SCLK low time
SYNC to SCLK falling edge setup time
Data setup time
Data hold time
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
SYNC rising edge to SCLK fall ignore
SCLK falling edge to SYNC fall ignore
AD5620/AD5640/AD5660
IL
+ V
IH
)/2. See Figure 2.

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