MCP4821-E/P Microchip Technology, MCP4821-E/P Datasheet - Page 6

• Manufacturer Part Number: MCP4821-E/P
• Description: IC DAC 12BIT W/SPI 8DIP
• Manufacturer: Microchip Technology

Specifications of MCP4821-E/P

• Number Of Converters: 1
• Package / Case: 8-DIP (0.300", 7.62mm)
• Settling Time: 4.5µs
• Number Of Bits: 12
• Data Interface: Serial, SPI™
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Resolution: 12 bit
• Interface Type: Serial (3-Wire, SPI, Microwire)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP4821/MCP4822
AC CHARACTERISTICS (SPI™ TIMING SPECIFICATIONS)
FIGURE 1-1:
DS21953A-page 6
Electrical Specifications: Unless otherwise indicated, V
Typical values are at +25°C.
Schmitt Trigger High-Level
Input Voltage
(All digital input pins)
Schmitt Trigger Low-Level
Input Voltage
(All digital input pins)
Hysteresis of Schmitt Trigger
Inputs
Input Leakage Current
Digital Pin Capacitance
(All inputs/outputs)
Clock Frequency
Clock High Time
Clock Low Time
CS Fall to First Rising CLK
Edge
Data Input Setup Time
Data Input Hold Time
SCK Rise to CS Rise Hold
Time
CS High Time
LDAC Pulse Width
LDAC Setup Time
SCK Idle Time before CS Fall
Note 1:
LDAC
SCK
CS
SI
Parameters
By design and characterization, not production tested.
Mode 1,1
Mode 0,0
t
CSSR
t
SPI™ Input Timing.
SU
MSb in
t
HD
I
LEAKAGE
t
C
V
F
Sym
t
CSSR
t
t
C
IDLE
V
t
t
CHS
CSH
V
t
t
t
HYS
OUT
t
CLK
SU
HD
LO
LD
LS
HI
IN
IH
IL
,
t
HI
0.7 V
Min
100
15
15
40
15
10
15
15
40
40
—
—
—
—
-1
t
LO
DD
0.05 V
Typ
DD
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
= 2.7V – 5.5V, T
DD
0.2 V
Max
20
—
—
—
—
—
—
—
—
—
—
—
—
—
1
DD
Units
MHz T
pF
A
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
A
= -40 to +125°C.
LSb in
SHDN = LDAC = CS = SDI =
SCK + V
V
f
Note 1
Note 1
Applies only when CS falls with
CLK high. (Note 1)
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
CLK
t
A
DD
CHS
= +25°C (Note 1)
= 5.0V, T
= 1 MHz (Note 1)
© 2005 Microchip Technology Inc.
t
LS
REF
Conditions
t
CSH
= V
t
A
IDLE
= +25°C,
DD
or AV
t
LD
SS