AD5543BRZ Analog Devices Inc, AD5543BRZ Datasheet - Page 10

IC DAC 16BIT SRLIN/CUR OUT 8SOIC

AD5543BRZ

Manufacturer Part Number
AD5543BRZ
Description
IC DAC 16BIT SRLIN/CUR OUT 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5543BRZ

Data Interface
Serial
Design Resources
Versatile High Precision Programmable Current Sources Using DACs, Op Amps, and MOSFET Transistors (CN0151)
Settling Time
500ns
Number Of Bits
16
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
55µW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resolution (bits)
16bit
Sampling Rate
1.2MSPS
Input Channel Type
Serial
Supply Voltage Range - Analog
4.5V To 5.5V
Supply Current
10µA
Digital Ic Case Style
SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD5543/AD5553
SERIAL DATA INTERFACE
The AD5543/AD5553 use a 3-wire ( CS , SDI, CLK) serial data
interface. New serial data is clocked into the serial input register
in a 16-bit data-word format for the AD5543. The MSB is loaded
first. Table 5 defines the 16 data-word bits. Data is placed on the
SDI pin and clocked into the register on the positive clock edge
of CLK, subject to the data setup-and-hold time requirements
that are specified in the interface timing specifications. Only the
last 16 bits clocked into the serial register are interrogated when
the CS pin is strobed to transfer the serial register data to the DAC
register. Because most microcontrollers output serial data in 8-
bit bytes, two data bytes can be written to the AD5543/AD5553.
After loading the serial register, the rising edge of CS transfers
the serial register data to the DAC register; during this strobe,
the CLK should not be toggled. For the AD5553, with 16-bit
clock cycles, the two LSBs are ignored.
ESD PROTECTION CIRCUITS
All logic input pins contain back-biased ESD protection Zener
diodes that are connected to ground (DGND) and V
shown in Figure 19.
Table 5. AD5543 Serial Input Register Data Format; Data Loaded MSB-First Format
B15 (MSB)
D15
Table 6. AD5553 Serial Input Register Data Format; Data Loaded MSB-First Format
B13 (MSB)
D13
1
A full 16-bit data-word can be loaded into the AD5553 serial input register, but only the last 14 bits entered are transferred to the DAC register when CS returns to
logic high.
1
B14
D14
B12
D12
B13
D13
B11
D11
B12
D12
B10
D10
B11
D11
B9
D9
DD
B10
D10
, as
B8
D8
Rev. E | Page 10 of 20
B9
D9
B7
D7
B8
D8
PCB LAYOUT AND POWER SUPPLY BYPASSING
It is a good practice to employ compact, minimum lead length
PCB layout design. The leads to the input should be as short as
possible to minimize IR drop and stray inductance.
It is also essential to bypass the power supplies with quality
capacitors for optimum stability. Supply leads to the device
should be bypassed with 0.01 µF to 0.1 µF disc or chip ceramic
capacitors. Low ESR 1 µF to 10 µF tantalum or electrolytic
capacitors should also be applied at the supplies to minimize
transient disturbance and filter out low frequency ripple.
The PCB metal traces between V
matched to minimize gain error.
B6
D6
B7
D7
B6
D6
B5
D5
Figure
B5
D5
B4
D4
19
V
DIGITAL
INPUTS
DD
. Equivalent ESD Protection Circuits
B4
D4
DGND
B3
D3
5kΩ
B3
D3
REF
B2
D2
and R
B2
D2
FB
B1
D1
should also be
B1
D1
B0 (LSB)
D0
B0 (LSB)
D0

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