CS4385-CQZ Cirrus Logic Inc, CS4385-CQZ Datasheet - Page 29

• Manufacturer Part Number: CS4385-CQZ
• Description: IC DAC 8CH 114DB 192KHZ 48LQFP
• Manufacturer: Cirrus Logic Inc

Specifications of CS4385-CQZ

• Package / Case: 48-LQFP
• Number Of Bits: 24
• Data Interface: Serial
• Number Of Converters: 8
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 520mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Conversion Rate: 216 KSPS
• Resolution: 24 bit
• Interface Type: Serial
• Operating Supply Voltage: 5 V
• Operating Temperature Range: + 85 C
• Maximum Power Dissipation: 390 mW
• Mounting Style: SMD/SMT
• Number Of Dac Outputs: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1154 - BOARD EVAL FOR CS4385 DAC
• Settling Time: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1063

DS671F2
4.9
4.9.1
4.10
Grounding and Power Supply Arrangements
As with any high-resolution converter, the CS4385 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. The Typical Connection Diagram shows the rec-
ommended power arrangements, with VA, VD, VLC, and VLS connected to clean supplies. If the ground
planes are split between digital ground and analog ground, the GND pins of the CS4385 should be connect-
ed to the analog ground plane.
All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted
coupling into the DAC.
Analog Output and Filtering
The application note “Design Notes for a 2-Pole Filter with Differential Input” discusses the second-order
Butterworth filter and differential to single-ended converter which was implemented on the CS4385 evalua-
tion board, CDB4385, as seen in
tion for an external filter. Therefore, the DAC system phase and amplitude response will be dependent on
the external analog circuitry. The off-chip filter has been designed to attenuate the typical full-scale output
level to below 2 Vrms.
Figure 23
Capacitor Placement
Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca-
pacitor being the closest. To further minimize impedance, these capacitors should be located on the same
layer as the DAC. If desired, all supply pins with similar voltage ratings may be connected to the same
supply, but a decoupling capacitor should still be placed on each supply pin.
Notes: All decoupling capacitors should be referenced to ground.
The CDB4385 evaluation board demonstrates the optimum layout and power supply arrangements.
shows how the full-scale differential analog output level specification is derived.
AOUT+
AOUT-
Full-Scale Output Level= (AOUT+) - (AOUT-)= 6.6 Vpp
Figure
Figure 23. Full-Scale Output
24. The CS4385 does not include phase or amplitude compensa-
4.15 V
2.5 V
0.85 V
4.15 V
2.5 V
0.85 V
CS4385
29