LTC2757AILX#PBF Linear Technology, LTC2757AILX#PBF Datasheet - Page 13
![IC DAC 18BIT PAR 48LQFP](/photos/6/60/66007/48-lqfp_sml.jpg)
LTC2757AILX#PBF
Manufacturer Part Number
LTC2757AILX#PBF
Description
IC DAC 18BIT PAR 48LQFP
Manufacturer
Linear Technology
Series
SoftSpan™r
Datasheet
1.LTC2757BILXPBF.pdf
(20 pages)
Specifications of LTC2757AILX#PBF
Settling Time
2.1µs
Number Of Bits
18
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
OPERATION
OPERATION—EXAMPLES
1. Load ±5V range with the output at 0V. Note that since span and code are updated together, the output, if started at
The offset adjust pin V
offset or bipolar zero error. The offset change expressed
in LSB is the same for any output range:
A 5V control voltage applied to V
–2048 LSB in any output range, assuming a 5V reference
voltage at R
In voltage terms, the offset delta is attenuated by a factor
of 32, 64 or 128, depending on the output range. (These
functions hold regardless of reference voltage.)
The gain error adjust pin GE
error or to compensate for reference errors. The gain er-
ror change expressed in LSB is the same for any output
range:
ΔV
ΔV
ΔV
0V, will stay there. The 18-bit DAC code is shown in hex for compactness.
ΔV
ΔGE =
READ = LOW
OS
OS
OS
SPAN I/O
DATA I/O
OS
INPUT
INPUT
V
= –(
= –(
= –(
UPD
[
WR
D/S
OUT
LSB
V(GE
IN
V(R
1
1
1
.
/
/
/
]
128
64
32
0V (00000
=
ADJ
IN
)V
)V
–V(V
)V
)
OSADJ
OSADJ
)
OSADJ
V(R
• 2048
H
OSADJ
OSADJ
IN 0V to 5V RANGE)
IN
)
ADJ
can be used to null unipolar
)
• 2048
[0V to 5V, ±2.5V spans]
[0V to 10V, ±5V, –2.5V to
7.5V spans]
[±10V span]
can be used to null gain
OSADJ
produces ΔV
010
OS
=
The gain-error delta is non-inverting for positive reference
voltages.
Note that this pin compensates the gain by altering the
inverted reference voltage V(REF). In voltage terms,
the V(REF) delta is inverted and attenuated by a factor
of 128.
The nominal input range of these pins is ±5V; other volt-
ages of up to ±15V may be used if needed. However, do
not use voltages divided down from power supplies; ref-
erence-quality, low-noise inputs are required to maintain
the best DAC performance.
The V
pin should be driven with a Thevenin-equivalent impedance
of 10k or less to preserve the settling performance of the
LTC2757. It should be shorted to GND if not used.
The GE
is intended for use with fi xed reference voltages only. It
should be shorted to GND if not used.
ΔV(REF) = –(
OSADJ
20000
ADJ
H
pin has an input impedance of 2.56MΩ, and
pin has an input impedance of 1.28MΩ. This
1
/
128
)GE
0V (20000
ADJ
UPDATE
(±5V RANGE, V
H
IN ±5V RANGE)
OUT
= 0V)
LTC2757
2757 TD03
13
2757f