MCP4921-E/SN Microchip Technology, MCP4921-E/SN Datasheet - Page 20

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MCP4921-E/SN

Manufacturer Part Number
MCP4921-E/SN
Description
IC DAC 12BIT SNGL W/SPI 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP4921-E/SN

Number Of Converters
1
Package / Case
8-SOIC (3.9mm Width)
Settling Time
4.5µs
Number Of Bits
12
Data Interface
Serial, SPI™
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Resolution
12 bit
Interface Type
Serial (3-Wire, SPI, Microwire)
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Package
8SOIC N
Architecture
Resistor-String
Digital Interface Type
Serial (3-Wire, SPI, Microwire)
Number Of Outputs Per Chip
1
Output Type
Voltage
Full Scale Error
1 %FSR
Integral Nonlinearity Error
±12 LSB
Maximum Settling Time
4.5(Typ) us
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MCP4921/4922
6.0
The MCP492X devices are general purpose DACs
intended to be used in applications where a precision,
low-power DAC with moderate bandwidth is required.
Applications generally suited for the MCP492X devices
include:
• Set Point or Offset Trimming
• Sensor Calibration
• Digitally-Controlled Multiplier/Divider
• Portable Instrumentation (Battery Powered)
• Motor Feedback Loop Control
6.1
The MCP492X utilizes a 3-wire syncronous serial
protocol to transfer the DACs’ setup and output values
from the digital source. The serial protocol can be inter-
faced to SPI™ or Microwire peripherals common on
many
PICmicro
trollers. In addition to the three serial connections (CS,
SCK and SDI), the LDAC signal syncronizes when the
serial settings are latched into the DAC’s output from
the serial input latch. Figure 6-1 illustrates the required
connections. Note that LDAC is active-low. If desired,
this input can be tied low to reduce the required con-
nections from 4 to 3. Write commands will be latched
directly into the output latch when a valid 16 clock
transmission has been received and CS has been
raised.
6.2
The typical application will require a by-pass capacitor
in order to filter high-frequency noise. The noise can
be induced onto the power supply's traces or as a result
of changes on the DAC's output. The bypass capacitor
helps to minimize the effect of these noise sources on
signal integrity. Figure 6-1 illustrates an appropriate
bypass strategy.
In this example, the recommended bypass capacitor
value is 0.1 µF. This capacitor should be placed as
close to the device power pin (V
4 mm).
The power source supplying these devices should be
as clean as possible. If the application circuit has sep-
arate digital and analog power supplies, AV
AV
DS21897A-page 20
Note:
SS
should reside on the analog plane.
TYPICAL APPLICATIONS
Digital Interface
Power Supply Considerations
®
microcontrollers,
MCUs & dsPIC
At the time of this data sheet’s release,
circuit examples had not completed
testing. Your results may vary.
TM
DSC family of microcon-
including
DD
) as possible (within
Microchip’s
DD
and
FIGURE 6-1:
Diagram.
6.3
Inductively-coupled AC transients and digital switching
noise can degrade the input and output signal integrity,
potentially masking the MCP492X’s performance.
Careful board layout will minimize these effects and
increase the signal-to-noise ratio (SNR). Bench testing
has shown that a multi-layer board utilizing a low-induc-
tance ground plane, isolated inputs, isolated outputs
and proper decoupling are critical to achieving the
performance that the silicon is capable of providing.
Particularly harsh environments may require shielding
of critical signals.
Breadboards and wire-wrapped boards are not
recommended if low noise is desired.
0.1 µF
V
V
V
V
REFA
OUTA
REFB
OUTB
Layout Considerations
V
AV
DD
SS
SDI
V
V
V
V
REFA
OUTA
REFB
OUTB
Typical Connection
 2004 Microchip Technology Inc.
V
AV
DD
SS
0.1 µF 0.1 µF
SDI
LDAC
SDO
SCK
CS
CS
1
0
V
AV
DD
SS

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