X9400WV24-2.7T1 Intersil, X9400WV24-2.7T1 Datasheet - Page 3

• Manufacturer Part Number: X9400WV24-2.7T1
• Description: IC XDCP QUAD 64-TAP 10K 24-TSSOP
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X9400WV24-2.7T1

• Taps: 64
• Resistance (ohms): 10K
• Number Of Circuits: 4
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Resistance In Ohms: 10K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9400.
Chip Select (CS)
When CS is HIGH, the X9400 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9400, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
PIN CONFIGURATION
V
V
V
V
W0
W1
V
V
H0
H1
L0
L1
/R
/R
/R
/R
V
/R
/R
V
WP
CS
CC
W0
W1
A
H0
H1
SS
L0
SI
L1
1
10
11
12
1
2
3
4
5
6
7
8
9
3
X9400
SOIC
13
14
24
23
22
21
20
19
18
17
16
15
V+
V
V
V
A
SO
HOLD
SCK
V
V
V
V-
L3
H3
W3
0
L2
H2
W2
/R
/R
/R
/R
/R
/R
L3
L2
H3
H2
W3
W2
X9400
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
Device Address (A
The address inputs are used to set the least significant
2 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9400. A maximum of 4 devices may occupy the
SPI serial bus.
Potentiometer Pins
V
V
The V
terminal connections on either end of a mechanical
potentiometer.
V
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
Analog Supplies (V+, V-)
The analog Supplies V+, V- are the supply voltages for
the XDCP analog section.
H
L3
W
/R
/R
/R
H
V
V
W
L3
V
V
H
W1
W2
V
V
(V
H1
H2
L1
L2
/R
(V
HOLD
)
/R
/R
/R
/R
H0
/R
/R
SCK
V
H
W0
W1
W2
A
SS
H1
H2
L1
V-
L2
SI
/R
1
and V
/R
H0
W0
- V
10
11
12
1
2
3
4
5
6
7
8
9
- V
L
0
H3
/R
TSSOP
X9400
- A
W3
L
/R
1
inputs are equivalent to the
H3
/R
)
W3
), V
14
13
24
23
22
21
20
19
18
17
16
15
)
L
/R
L
WP
CS
V
V
V
V
V+
V
V
V
A
SO
W0
H0
L0
CC
L3
H3
W3
0
(V
/R
/R
/R
/R
/R
/R
L0
L0
L3
H0
H3
W0
W3
/R
L0
July 28, 2006
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FN8189.3