ISL90810UIU8 Intersil, ISL90810UIU8 Datasheet - Page 4

IC XDCP 256-TAP 50KOHM 8-MSOP

ISL90810UIU8

Manufacturer Part Number
ISL90810UIU8
Description
IC XDCP 256-TAP 50KOHM 8-MSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of ISL90810UIU8

Taps
256
Resistance (ohms)
50K
Number Of Circuits
1
Temperature Coefficient
35 ppm/°C Typical
Memory Type
Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Resistance In Ohms
50K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL90810UIU8Z
Manufacturer:
Intersil
Quantity:
48
Operating Specifications
SERIAL INTERFACE SPECIFICATIONS
t
Cpin (Note 14) SDA, and SCL Pin Capacitance
t
V
DCP
t
BUF
t
t
AA
IN
OL
D
V
Hysteresis
SYMBOL
(Note 14)
t
t
t
t
t
CC
I
SU:STO
(Note 14)
SU:STA
HD:STA
SU:DAT
HD:DAT
(Note 14)
LkgDig
t
(Note 14)
t
I
Vpor
(Note 14) SDA Output Buffer LOW Voltage,
f
HIGH
(Note 14) DCP Wiper Response Time
(Note 14) Time the Bus Must be Free Before the
LOW
V
CC1
I
V
SCL
SB
Ramp
IH
IL
V
(Volatile Write/Read)
V
Leakage Current at Pins SDA and
SCL
Power-On Recall Voltage
V
Power-Up Delay
SDA, and SCL Input Buffer LOW
Voltage
SDA, and SCL Input Buffer HIGH
Voltage
SDA and SCL Input Buffer Hysteresis
Sinking 4mA
SCL Frequency
Pulse Width Suppression Time at
SDA and SCL Inputs
SCL Falling Edge to SDA Output Data
Valid
Start of a New Transmission
Clock LOW Time
Clock HIGH Time
START Condition Setup Time
START Condition Hold Time
Input Data Setup Time
Input Data Hold Time
STOP Condition Setup Time
CC
CC
CC
Supply Current
Current (Standby)
Ramp Rate
PARAMETER
4
Over the recommended operating conditions unless otherwise specified.
f
Read and Volatile Write States only)
V
Temperature range from -40°C to +85°C
V
Temperature range from -40°C to +105°C
V
Temperature range from -40°C to +85°C
V
Temperature range from -40°C to +105°C
Voltage at pin from GND to V
SCL falling edge of last bit of DCP Data Byte to
wiper change
Minimum V
V
recall completed, and I
Any pulse narrower than the max spec is
suppressed.
SCL falling edge crossing 30% of V
exits the 30% to 70% of V
SDA crossing 70% of V
condition, to SDA crossing 70% of V
the following START condition.
Measured at the 30% of V
Measured at the 70% of V
SCL rising edge to SDA falling edge. Both
crossing 70% of V
From SDA falling edge crossing 30% of V
SCL falling edge crossing 70% of V
From SDA exiting the 30% to 70% of V
window, to SCL rising edge crossing 30% of V
From SCL rising edge crossing 70% of V
SDA entering the 30% to 70% of V
From SCL rising edge crossing 70% of V
SDA rising edge crossing 30% of V
SCL
CC
CC
CC
CC
CC
= +5.5V, I
= +5.5V, I
= +3.6V, I
= +3.6V, I
above Vpor, to DCP Initial Value Register
= 400kHz; SDA = Open; (for I
ISL90810
CC
TEST CONDITIONS
2
2
2
2
at which memory recall occurs
C Interface in Standby State,
C Interface in Standby State,
C Interface in Standby State,
C Interface in Standby State,
CC
.
2
C Interface in standby state
CC
CC
CC
CC
during a STOP
CC
window.
crossing.
crossing.
CC
CC
2
CC
CC
C, Active,
CC
, until SDA
window.
.
.
CC
during
CC
CC
CC
, to
to
to
CC
0.7*V
0.05*
1300
1300
V
MIN
-0.3
600
600
600
100
600
-10
1.8
0.2
CC
0
0
CC
(Note 1)
TYP
0.8
0.8
20
2
2
V
0.3*V
CC
MAX
100
400
900
2.6
0.4
10
10
50
5
8
2
5
1
3
November 10, 2006
+0.3
CC
UNITS
FN8234.2
V/ms
kHz
ms
µA
µA
µA
µA
µA
µA
pF
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V

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