MCIMX-LVDS1 Freescale Semiconductor, MCIMX-LVDS1 Datasheet - Page 121

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MCIMX-LVDS1

Manufacturer Part Number
MCIMX-LVDS1
Description
MCIMX-LVDS1
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MCIMX-LVDS1

Rohs Compliant
YES
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
VLCD_BLT
VDDOUT
GND
VDDOUT
GND
GND
C229
2.2UF
C206
1.0U F
C215
1.0U F
GND
GND
C227
4.7uF
R154
1M
R155
68K
1
L16
4.7UH
GND
C231
2.2UF
DNP
R153
0.1
2
7
6
2
4
VDDOUT_SUP
E2
E1
J2
G2
H2
K2
M3
NTLJF4156N
13
U20A
DA9053
VDD _LDO1
VDD _LDO2
VDD _LDO3_4
VDD _LDO5
VDD _LDO6
VDD _LDO7_8
VDD _LDO9_10
Q8
LCD_BLT1_N
1
8
3
SW_BOOST
BOOST_SENSE_P
BOOST_PROT
C220
GND
VDDCORE
GND
GND
VLD O10
10UF
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VLDO9
C222
22UF
C226
22UF
N13
D13
M10
N10
N11
K13
J13
E13
N9
M9
L8
L7
D 1
F2
J1
H 1
F1
G1
K1
L1
M1
N 2
D 2
U20B
DA9053
VDD BUCK_MEM
VDD BUCK_PER_PRO_K13
VDD BUCK_PER_PRO_J13
VDD BUCK_CORE_D13
VDD BUCK_CORE_E13
SW _BOOST
BOOST_SENSE_P
BOOST_SENSE_N
BOOST_PROT
LED1_IN
LED2_IN
LED3_IN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C196
C199
C207
C214
C218
C194
2.2UF
C203
2.2UF
C210
2.2UF
C211
2.2UF
C213
2.2UF
C216
2.2UF
SWBUCKCORE_G13
SWBUCKCORE_F13
1.0U F
1.0U F
1.0U F
1.0U F
0.1U F
VSS_NOISY _D6
SW BUCKPERI
SW BUCKMEM
SW BUCKPRO
VBUCKCORE
VBUCKPERI
VBUCKMEM
VBUCKPRO
VPERI_SW
VMEM_SW
SY S_UP
VLDO1_1V3_RTC
DIG_PLL_1V3
VLDO9_1V5
VLDO3_3V3
VIOHI_2V775
VLDO5_1V3
VLDO6_1V3
VLDO7_2V75
VLDO8_1V8
VLDO10_1V3
VD DCORE
E12
L13
D12
C12
M13
B12
F12
L12
G13
F13
M12
H13
D6
GND
SW BUCKPERI
SW BUCKMEM
SW BUCKCORE
SW BUCKPRO
SY S_UP
6
CDRH2D18/HP-2R2NC
CDRH2D18/HP-2R2NC
CDRH2D18/HP-2R2NC
CDRH2D18/HP-2R2NC
TP20
L14
1
L15
1
L17
1
L18
1
2.2U H
2.2U H
2.2U H
2.2U H
2
2
2
2
VBUCKCORE
13
13
GND
GND
GND
GND
PORT_ID 0
PORT_ID 1
VBUCKPRO
VBU CKPERI
Supply for CORE to
be configured @1.1V
C221
22UF
VBUCKMEM
C224
22UF
C228
22UF
C230
22UF
2000mA max
Supply for VDD_REG to
be configured @2.5V
Supply for DDR3
memories @1.5V
1000mA max
Supply for VCC to
be configured @1.3V
1000mA max
1000mA max
VLDO8_1V8
VDDCORE
R149
10K
R150
10K
GND
GND
5V_MAIN
TP11
13
13
13
13
GN D
C223
0.1UF
C225
0.1UF
R151
VPERI_SW
VMEM_SW
TS_Y N
TS_Y P
TS_XN
TS_XP
C204
4.7uF
3
0
SHDN_5V
3
ADCIN6/GPIO_2
TP24
5V_JK
TBAT
TSIREF_GPIO_7
VDDCORE
R152
4.7K
6
GND
GND
B13
C13
A5
A6
B5
B6
A3
A4
B3
B4
C6
C5
C4
K6
K8
K5
K7
K9
L6
nON KEY /KEEPACT
13,15
13,15
U20C
DA9053
VBUS_PROT_A5
VBUS_PROT_A6
VBUS_SEL
VBUS
DCIN_PROT_A3
DCIN_PROT_A4
DCIN_SEL
DCIN
D-
D+
TBAT
ADCIN4_GPIO_0
ADCIN5_GPIO_1
ADCIN6_GPIO_2
TSIY N_GPIO_3
TSIY P_GPIO_4
TSIXN_GPIO_5
TSIXP_GPIO_6
TSIREF_GPIO_7
TP14
TP16
TP18
I2C1_SDA
I2C1_SCL
TP23
TP19
SY S_EN
PW R_EN
PW R1_EN
nSHUTDOW N
VDDOUT_A11
VDDOUT_A10
GPIO_14
GPIO_15
VCENTER
AD_CONT
VBAT_A13
VBAT_A12
VDD_REF
OUT_32K
VSW_A8
VSW_A9
VBBAT
VREF
XOUT
IREF
XIN
A7
A8
A9
A11
A10
B11
A13
A12
B2
A2
D5
C2
K12
B1
C1
M11
D10
C10
D11
L10
K10
L11
K11
L2
L3
N1
M2
VCENTER
VSW
PMIC_VREF
PMIC_IREF
PMIC_VDD_REF
U20D
DA9053
AD_CONT
NON KEY _KEEP_ACT
SY S_EN_GPIO_8
PWR_EN_GPIO_9
PWR1_EN _GPIO_10
ACC_ID_DET_GPIO_11
NSHUTDOWN
SO
SI
SK
NCS
DATA_GPIO_14
CLK_GPIO_15
GND
C195
1
L13
1
D8
NVDD_FAULT_GPIO_13
2.2UH
C208
R148
10UF
BAT760
C212
GP_FB1_GPIO_12
PWR_UP_GP_FB2
2
0.1U F
200K
0.22UF
2
GND
GND
VDD_IO1
VDD_IO2
1
NRESET
GND
NIRQ
TP
Si2333DS
GND
5V_MAIN
Q7
L4
K4
F10
E10
C11
B10
J10
L5
C209
0.47UF
1
2
HDR 1X2
DNP
VBBAT
GP_FB1
J19
TESTP
GND
TP15
GN D
1
1
C200
10UF
VLDO3_3V3
SH30
0
CL
2.7mm
+
-
GND
nRESET
nIRQ
nVDD_FAULT
3V3_EN
JP1
HDR 1X1
DNP
JP2
HDR 1X1
DNP
JP1 and JP2 for
OPTIONAL
COIN CELL
TP17
TP21
VDDOUT
C201
10UF
JP1
6
CL 3mm
ML1220-VM1
LAYOUT &
KEEPOUT
6
3
4mm
3.6 to VBAT+200mV
TP12
+
-
6
JP2
VLD O8_1V8
GND
C205
47UF
13mm
VBAT
TP13
GND
TBAT
R203
10K
3
2
1
CON_1X3
J14
DNP
GND
E8
E7
G9
H8
E9
F8
E6
H7
E5
G7
F7
F6
Pins D7 and F5 can
be left open as they
are "NC" pins.
J7
U20E
VSS_NOISY _E8
VSS_NOISY _E7
VSS_NOISY _G9
VSS_NOISY _H8
VSS_NOISY _E9
VSS_NOISY _F8
VSS_NOISY _E6
VSS_NOISY _J7
VSS_NOISY _H7
VSS_NOISY _E5
VSS_NOISY _G7
VSS_NOISY _F7
VSS_NOISY _F6
VSS_QUIET_H6
VSS_NOISY _J9
VSS_QUIET_G5
VSS_NOISY _D7
VSS_NOISY _F5
VSS_NOISY _F9
VSS_NOISY _G8
VSS_NOISY _J8
VSS_NOISY _H9
VSS_QUIET_H5
VSS_QUIET_G6
VSS_QUIET_J5
VSS_QUIET_J6
DA9053
H6
J9
G5
J5
J6
D7
F5
F9
G8
J8
H9
H5
G6
GND
Note:
Traces are routed to NC pins for layout purposes only.
This allows signals to route out of chip via NC pins
on the top layer. NC pins are not connected to any
pad internal to the PMIC.
VBUCKCORE
VDD OUT
ADCIN6/GPIO_2
PMIC_VDD_REF
PMIC_IREF
nSHUTDOWN
nIRQ
nRESET
nRESET
GND
VBBAT
ICAP Classif ication:
Drawing Title:
Page Title:
Size
D
Date:
G10
G12
G11
E11
F11
A1
B7
B8
B9
C3
C7
C8
C9
D3
D4
D8
D9
E3
E4
F3
F4
G3
G4
U20F
DA9053
NC _A1
NC _B7
NC _B8
NC _B9
NC _C3
NC _C7
NC _C8
NC _C9
NC _D3
NC _D4
NC _D8
NC _D9
NC _E3
NC _E4
NC _E11
NC _F3
NC _F4
NC _F11
NC _G3
NC _G4
NC _G10
NC _G12
NC _G11
Document Number
W ednesday , January 12, 2011
MCIMX53-QUICKSTART
PMIC DA9053
FCP:
SOURC E:SCH-26565 PDF:SPF-26565
___
NC_H10
NC_H11
NC_H12
NC_J11
NC_J12
NC_N12
NC_H3
NC_H4
NC_K3
NC_M4
NC_M5
NC_M6
NC_M7
NC_M8
NC_N3
NC_N4
NC_N5
NC_N6
NC_N7
NC_N8
NC_J3
NC_J4
NC_L9
GND
FIUO:
H3
H4
H10
H11
H12
J3
J4
J11
J12
K3
L9
M4
M5
M6
M7
M8
N3
N4
N5
N6
N7
N8
N12
Sheet
X
LCD_BLT3_N
LCD_BLT2_N
LCD_BLT3_N
LCD_BLT2_N
VDD OUT
PUBI:
14
I2C1_SDA
I2C1_SCL
TESTP
TBAT
TESTP
TBAT
___
TSIREF_GPIO_7
of
3V3_EN
VLDO3_3V3
15
Rev
C

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