CAT5270YI-00-GT2 ON Semiconductor, CAT5270YI-00-GT2 Datasheet - Page 8

• Manufacturer Part Number: CAT5270YI-00-GT2
• Description: IC POT DPP 100K 256TAP 14TSSOP
• Manufacturer: ON Semiconductor

Specifications of CAT5270YI-00-GT2

• Taps: 256
• Resistance (ohms): 100K
• Number Of Circuits: 2
• Temperature Coefficient: 100 ppm/°C Typical
• Memory Type: Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Resistance In Ohms: 100K
• Number Of Elements: 1
• # Of Taps: 256
• Resistance (max): 100KOhm
• Power Supply Requirement: Single
• Interface Type: Serial (I2C)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.5V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Instruction Format
Read Wiper Control Register (WCR)
Write Wiper Control Register (WCR)
Increment (I)/Decrement (D) Wiper Control Register (WCR)
S
T
A
R
T
S
T
A
R
T
S
A
R
T
T
SDA
SDA
Command
SDA
INC/DEC
0
0
0
Issued
SDA
S
T
A
R
T
SCL
1
1
S
T
A
R
T
S
T
A
R
T
R
1
W
DEVICE ADDRESSES
DEVICE ADDRESSES
ID3I D2 ID1 ID0
ID3I D2 ID1 ID0
ID3I D2 ID1 ID0
0
0
0
0
0
DEVICE ADDRESSES
Device ID
Device ID
Device ID
0
1
1
1
1
1
1
A3
A3
0
0
0
1
A3
1
1
A2
A2
A3
A3
A3
A2
A2 A1 A0 A
Address
Figure 10. Increment/Decrement Timing Limits
A2 A1 A0 A
Internal
A1
A1
Address
A2 A1 A0 A
Figure 9. Increment/Decrement Instruction Sequence
Internal
Address
Internal
A1
A0
A0
Figure 7. Write Instruction Sequence
Figure 8. Read Instruction Sequence
A0
A
C
K
A
C
K
C
K
C
K
C
K
1
1
A
C
K
I3
Voltage Out
1
I3
1
I3
0
Instruction
Instruction
Opcode
0
0
Instruction
http://onsemi.com
Opcode
I2
0
0
I2
Opcode
0
I2
0
INSTRUCTION
INSTRUCTION
0
1
I1 I0 F2 F1
1
I1 I0 F2 F1
0
0
I1 I0 F2 F1
1
1
0
0
1
8
0
1
INSTRUCTION
0
0
0
0
0
Fixed
Fixed
0
0
Fixed
0
0
0
0
F0 P
0
F0 P
0
Pot/WCR
0
0
0
Pot/WCR
F0 P
0
Pot/WCR
P
P
0
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
7
7
N
C
1
I
t
WRL
P
6
6
Data Register D[7:0]
N
C
2
I
No Fixed Length
A
C
K
WCR[7:0]
5
5
D
DATA
4
DATA
4
I
/
N
C
n
I
3
3
D
E
C
D
1
I
/
DATA
2
2
. .
.
1
1
D
E
C
n
D
I
/
0
0
A
C
K
1
A
C
K
O
S
T
P
D
I
/
S
T
O
P
S
T
O
P
A
C
K
A
C
K
S
O
P
T
O
O
S
T
P
S
T
P