DS3902U-530+T&R Maxim Integrated Products, DS3902U-530+T&R Datasheet - Page 7

• Manufacturer Part Number: DS3902U-530+T&R
• Description: IC DIGITAL RESISTER EEPROM 8USOP
• Manufacturer: Maxim Integrated Products

Specifications of DS3902U-530+T&R

• Taps: 256
• Resistance (ohms): 30K, 50K
• Number Of Circuits: 2
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.4 V ~ 5.5 V
• Operating Temperature: -40°C ~ 95°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Resistance In Ohms: 30K, 50K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-3902T+530

ters in the Memory Map). The Configuration register
contains a bit (R0 and R1) for each resistor to enable
the High-Z state. When one of the High-Z bits is written
to a ‘1’, the corresponding resistor goes High-Z. When
written back to a ‘0’, the resistor goes back to the pro-
grammed resistance. Writing the Resistor 0 or Resistor
1 register to 00h, sets the respective resistor to its mini-
mum position (and minimum resistance). This value can
be found in the Analog Resistor Characteristics electri-
cal table. Writing Resistor 0 or Resistor 1 to FFh, sets
the resistor to its maximum resistance. The nominal
resistance (in ohms) of the resistors can be found in the
ordering information table at the beginning of this data
sheet.
When the DS3902 is powered up, the resistors are both
set to High-Z instantaneously while the settings stored
in EEPROM are recalled.
The I
state of the ADD_SEL pin. If this pin is low, then the
slave address is A2h. If the ADD_SEL pin is high, then
the slave address is determined by the value stored in
EEPROM at address 00h. Refer to the Memory Map to
see the factory default of the slave address. The seven
most significant bits are used (the LSB is not used
because it is in the bit position of the
the slave address to be programmed to one of 128
possible addresses. The I
detail in a later section.
Table 1. Memory Map
X = Don’t care.
DESCRIPTION
Slave Address
Configuration
2
Resistor 0
Resistor 1
Password
Password
Memory
Memory
C slave address of the DS3902 depends on the
Setting
Entry
User
No
Slave Address & ADD_SEL Pin
ADDR
08h–
10h–
00h
01h
02h
03h
04h
05h
06h
07h
0Fh
1Fh
2
C interface is described in
MSB
16 BYTES OF GENERAL PURPOSE EEPROM
b7
b7
X
b6
b6
X
_____________________________________________________________________
SLAVE ADDRESS
R/W bit) to allow
b5
b5
X
b4
b4
BINARY
PW MSB
PW MSB
PW LSB
PW LSB
X
—
Dual, NV, Variable Resistors
b3
X
b
b2
b2
X
R1
b1
b1
Software write protection is enabled by creating a two
byte password and writing it to the Password Setting
register (06h to 07h). When write protected, all memory
locations can be read, but only the Password Entry reg-
ister (04h to 05h) can be written. When the correct
password is entered, then the memory can be written
to. Refer to the Memory Map to see which registers can
be read/written with and without the password (PW).
When shipped from the factory, the password setting is
FFFFh. Likewise, every time the device is powered-up
the Password Entry register (which is RAM, not EEP-
ROM) defaults to FFFFh, giving full access to the
device. If write protection is not desired, then leave the
Password Setting at the factory default and ignore the
Password Entry register.
The following terminology is commonly used to describe
I
Master Device: The master device controls the slave
devices on the bus. The master device generates SCL
clock pulses, START, and STOP conditions.
Slave Devices: Slave devices send and receive data
at the master’s request.
Bus Idle or Not Busy: Time between STOP and START
conditions when both SDA and SCL are inactive and in
their logic high states. When the bus is idle it often initi-
ates a low-power mode for slave devices.
2
C data transfers.
LSB
R0
b0
b0
X
I
2
C Serial Interface Description
with User EEPROM
FACTORY
DEFAULT
ALL FFh
A0h
00h
7Fh
7Fh
FFh
FFh
FFh
FFh
—
Software Write Protection
W/O PW
—
—
W
R
R
R
R
R
ACCESS
W/PW
R/W
R/W
R/W
R/W
R/W
R/W
I
—
W
2
C Definitions
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
TYPE
RAM
—
7