X9268US24Z Intersil, X9268US24Z Datasheet - Page 6

• Manufacturer Part Number: X9268US24Z
• Description: IC XDCP DUAL 256TAP 50K 24-SOIC
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X9268US24Z

• Taps: 256
• Resistance (ohms): 50K
• Number Of Circuits: 2
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Resistance In Ohms: 50K
• Track Taper: Linear
• Resistance Tolerance: ± 20%
• No. Of Steps: 256
• Supply Voltage Range: 4.5V To 5.5V
• Control Interface: 2 Wire, Serial
• No. Of Pots: Dual
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRINCIPLES OF OPERATION
The X9268 is a integrated microcircuit incorporating
four resistor arrays and their associated registers and
counters and the serial interface logic providing direct
communication between the host and the digitally
controlled potentiometers. This section provides detail
description of the following:
– Resistor Array Description
– Serial Interface Description
– Instruction and Register Description.
Array Description
The X9268 is comprised of a resistor array (See
Figure 1). Each array contains 255 discrete resistive
segments that are connected in series. The physical
ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (R
inputs).
Figure 1. Detailed Potentiometer Block Diagram
IF WCR = 00[H] THEN R
IF WCR = FF[H] THEN R
One of Two Potentiometers
FROM INTERFACE
SERIAL DATA PATH
CIRCUITRY
W
W
= R
= R
L
REGISTER 0
REGISTER 2
6
H
(DR0)
(DR2)
8
H
REGISTER 1
REGISTER 3
and R
MODIFIED SCL
(DR1)
(DR3)
L
X9268
UP/DN
8
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(R
switch may be turned on at a time.
These switches are controlled by a Wiper Counter
Register (WCR). The 8-bits of the WCR (WCR[7:0])
are decoded to select, and enable, one of 256
switches (See Table 1).
The WCR may be written directly. These Data
Registers can the WCR can be read and written by the
host system.
Power-up and Down Requirements.
At all times, the voltages on the potentiometer pins
must be less than V+ and more than V-. During power-
up and power-down, V
final values within 1msecs of each other. The V
ramp rate spec is always in effect.
UP/DN
CLK
PARALLEL
BUS
INPUT
SERIAL
BUS
INPUT
W
REGISTER
COUNTER
) output. Within each individual array only one
INC/DEC
WIPER
LOGIC
(WCR)
C
O
U
N
T
E
R
D
E
C
O
D
E
CC
, V+, and V- must reach their
R
R
R
H
L
W
August 29, 2006
FN8172.4
CC