AD5231BRU10 Analog Devices Inc, AD5231BRU10 Datasheet - Page 16

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AD5231BRU10

Manufacturer Part Number
AD5231BRU10
Description
IC DGTL POT 1024POS 16-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5231BRU10

Rohs Status
RoHS non-compliant
Taps
1024
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
600 ppm/°C Typical
Memory Type
Non-Volatile
Interface
4-Wire SPI Serial
Voltage - Supply
2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Resistance In Ohms
10K
End To End Resistance
10kohm
Track Taper
Logarithmic
Resistance Tolerance
+20, -40%
No. Of Steps
1024
Supply Voltage Range
2.7V To 5.5V, ± 2.25V To ± 2.75V
Control Interface
Serial, SPI
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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AD5231
TERMINAL VOLTAGE OPERATION RANGE
The AD5231’s positive V
define the boundary conditions for proper 3-terminal digital
potentiometer operation. Supply signals present on the A, B,
and W terminals that exceed V
internal forward-biased diodes (see Figure 40).
The ground pin of the AD5231 device is primarily used as a
digital ground reference, which needs to be tied to the common
ground of the PCB. The digital input control signals to the
AD5231 must be referenced to the device ground pin (GND)
and satisfy the logic level defined in the Specifications section.
An internal level-shift circuit ensures that the common-mode
voltage range of the three terminals extends from V
regardless of the digital input level.
Figure 40. Maximum Terminal Voltages Set by V
DD
and negative V
DD
or V
SS
are clamped by the
SS
power supplies
DD
V
A
W
B
V
DD
SS
and V
SS
to V
SS
DD
,
Rev. C | Page 16 of 28
POWER-UP SEQUENCE
Because there are diodes to limit the voltage compliance at the
A, B, and W terminals (Figure 40), it is important to power
V
Terminal B, and Terminal W. Otherwise, the diode is forward-
biased such that V
might affect the rest of the user’s circuit. The ideal power-up
sequence is GND, V
order of powering V
important as long as they are powered after V
Regardless of the power-up sequence and the ramp rates of the
power supplies, once V
remains effective, which restores the EEMEM value to the
RDAC register.
LATCHED DIGITAL OUTPUTS
A pair of digital outputs, O1 and O2, is available on the
AD5231. These outputs provide a nonvolatile Logic 0 or Logic 1
setting. O1 and O2 are standard CMOS logic outputs, shown in
Figure 41. These outputs are ideal to replace the functions often
provided by DIP switches. In addition, they can be used to drive
other standard CMOS logic-controlled parts that need an
occasional setting change. Pin O1 and Pin O2 default to Logic 1,
and they can drive up to 50 mA of load at 5 V/25°C.
DD
/V
SS
first before applying any voltage to Terminal A,
Figure 41. Logic Outputs O1 and O2
DD
GND
V
DD
A
DD
/V
, V
, V
SS
DD
B
are powered unintentionally and
SS
, V
/V
, digital inputs, and V
SS
W
OUTPUTS
, and digital inputs is not
are powered, the power-on preset
O1 AND O2
PINS
DD
/V
A
/V
SS
.
B
/V
W
. The

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