AD5204BRZ100 Analog Devices Inc, AD5204BRZ100 Datasheet - Page 7

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AD5204BRZ100

Manufacturer Part Number
AD5204BRZ100
Description
IC DGTL POT QUAD 100K 24-SOIC
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD5204BRZ100

Temperature Coefficient
700 ppm/°C Typical
Taps
256
Resistance (ohms)
100K
Number Of Circuits
4
Memory Type
Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V, ±2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Resistance In Ohms
100K
End To End Resistance
100kohm
No. Of Steps
256
Resistance Tolerance
± 30%
Supply Voltage Range
2.7V To 5.5V
Control Interface
Serial, 3-Wire
No. Of Pots
Quad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 3. AD5204 SOIC/TSSOP/PDIP Pin Function Descriptions
Pin No.
1, 2, 12
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
23
24
Name
NC
GND
CS
PR
V
SHDN
SDI
CLK
SDO
V
B3
W3
A3
B1
W1
A1
A2
W2
B2
A4
W4
B4
DD
SS
Description
Not Connected.
Ground.
Chip Select Input (Active Low). When CS returns high, data in the serial input register is decoded based on the address
bits, and then it is loaded into the target RDAC latch.
Preset to Midscale (Active Low). This pin sets the RDAC registers to 0x80.
Positive Power Supply. This pin is specified for operation at both 3 V and 5 V. It is the sum of |V
Terminal A Open-Circuit Shutdown (Active Low Input). This pin controls VR 1 through VR 4.
Serial Data Input. Data is input MSB first.
Serial Clock Input. This pin is positive edge triggered.
Serial Data Output. This pin is an open-drain transistor and requires a pull-up resistor.
Negative Power Supply. This pin is specified for operation at both 0 V and −2.7 V. It is the sum of |V
Terminal B RDAC 3.
Wiper RDAC 3. Address = 010
Terminal A RDAC 3.
Terminal B RDAC 1.
Wiper RDAC 1. Address = 000
Terminal A RDAC 1.
Terminal A RDAC 2.
Wiper RDAC 2. Address = 001
Terminal B RDAC 2.
Terminal A RDAC 4.
Wiper RDAC 4. Address = 011
Terminal B RDAC 4.
Figure 6. AD5204 SOIC/TSSOP/PDIP Pin Configuration
2
2
2
2
.
.
.
.
SHDN
GND
SDO
CLK
V
V
SDI
NC
NC
NC
CS
PR
DD
SS
10
12
11
1
2
3
4
5
6
7
8
9
Rev. C | Page 7 of 20
NC = NO CONNECT
(Not to Scale)
AD5204
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
B4
W4
A4
B2
W2
A2
A1
W1
B1
A3
W3
B3
AD5204/AD5206
DD
| + |V
DD
| + |V
SS
| < 5.5 V.
SS
| < 5.5 V.

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