AD5161BRMZ50 Analog Devices Inc, AD5161BRMZ50 Datasheet - Page 7

• Manufacturer Part Number: AD5161BRMZ50
• Description: IC POT DGTL 50K 256POS 10-MSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5161BRMZ50

• Temperature Coefficient: 45 ppm/°C Typical
• Taps: 256
• Resistance (ohms): 50K
• Number Of Circuits: 1
• Memory Type: Volatile
• Interface: I²C, SPI
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Resistance In Ohms: 50K
• End To End Resistance: 50kohm
• No. Of Steps: 256
• Resistance Tolerance: ± 30%
• Supply Voltage Range: 2.7V To 5.5V
• Control Interface: Serial, I2C
• No. Of Pots: Single
• Number Of Elements: 1
• # Of Taps: 256
• Resistance (max): 50KOhm
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Description
Pin No.
1
2
3
4
5
6
7
8
9
10
Mnemonic
A
B
CS /AD0
SDO/NC
SDI/SDA
CLK/SCL
GND
DIS
V
W
DD
Description
A Terminal.
B Terminal.
Chip Select ( CS ) Input, Active Low. When CS returns high, data will be loaded into the DAC register.
Programmable address bit 0 (AD0) for multiple package decoding.
Serial Data Output (SDO). Open-drain transistor requires pull-up resistor.
No Connect (NC).
Serial Data Input (SDI).
Serial Data Input/Output (SDA).
Serial Clock Input. Positive edge triggered.
Digital Ground.
Digital Interface Select (SPI/I
Positive Power Supply.
W Terminal.
SDI/SDA
CS/ADO
SDO/NC
2
C Select). SPI when DIS = 0, I
Figure 3. Pin Configuration
A
B
Rev. A | Page 7 of 20
1
2
3
4
5
(Not to Scale)
AD5161
TOP VIEW
10
9
8
7
6
W
V
DIS
GND
CLK/SCL
DD
2
C when DIS = 1.
AD5161