AD5258BRMZ100 Analog Devices Inc, AD5258BRMZ100 Datasheet - Page 19

• Manufacturer Part Number: AD5258BRMZ100
• Description: IC POT DGTL I2C 100K 64P 10MSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5258BRMZ100

• Memory Type: Non-Volatile
• Temperature Coefficient: 200 ppm/°C Typical
• Taps: 64
• Resistance (ohms): 100K
• Number Of Circuits: 1
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Resistance In Ohms: 100K
• End To End Resistance: 100kohm
• Resistance Tolerance: ± 30%
• No. Of Steps: 64
• Supply Voltage Range: 2.7V To 5.5V
• No. Of Pots: Single
• Control Interface: I2C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD5258EVAL - BOARD EVAL FOR AD5258 DGTL POT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ESD PROTECTION OF DIGITAL PINS AND
RESISTOR TERMINALS
The AD5258 V
boundary conditions for proper 3-terminal and digital input
operation. Supply signals present on Terminal A, Terminal B,
and Terminal W that exceed V
internal forward biased ESD protection diodes (see Figure 41).
Digital Input SCL and Digital Input SDA are clamped by ESD
protection diodes with respect to V
Figure 42.
POWER-UP SEQUENCE
Because the ESD protection diodes limit the voltage compliance
at Terminal A, Terminal B, and Terminal W (see Figure 41), it is
important to power GND/V
voltage to Terminal A, Terminal B, and Terminal W; otherwise,
the diode is forward biased such that V
powered unintentionally and may affect the user’s circuit. The
ideal power-up sequence is in the following order: GND, V
V
powering V
long as they are powered after GND/V
LAYOUT AND POWER SUPPLY BYPASSING
It is good practice to employ compact, minimum lead length
layout design. The leads to the inputs should be as direct as
possible with minimum conductor length. Ground paths should
have low resistance and low inductance.
LOGIC
, digital inputs, and then V
Figure 42. Maximum Terminal Voltages Set by V
Figure 41. Maximum Terminal Voltages Set by V
A
, V
DD
B
, V
, V
W
LOGIC
, and the digital inputs is not important as
, and GND power supplies define the
DD
/V
DD
A
LOGIC
or GND are clamped by the
, V
LOGIC
B
, V
before applying any
DD
DD
and GND as shown in
W
/V
V
A
W
B
GND
V
SCL
SDA
GND
DD
LOGIC
and V
. The relative order of
LOGIC
LOGIC
DD
.
LOGIC
and GND
and GND
are
DD
Rev. 0 | Page 19 of 24
,
Similarly, it is also good practice to bypass the power supplies
with quality capacitors for optimum stability. Supply leads to
the device should be bypassed with disc or chip ceramic
capacitors of 0.01 µF to 0.1 µF. Low ESR 1 µF to 10 µF tantalum
or electrolytic capacitors should also be applied at the supplies
to minimize any transient disturbance and low frequency ripple
(see Figure 43). The digital ground should also be joined
remotely to the analog ground at one point to minimize the
ground bounce.
MULTIPLE DEVICES ON ONE BUS
The AD5258 has two three-state configurable Address Pins
AD0 and AD1. The state of these two pins is registered upon
power-up and decoded into a corresponding I
(see Table 5). This allows up to nine devices on the bus to be
written to, or read from, independently. In the case that the pin
is assigned to be floated, the static voltage will be V
EVALUATION BOARD
An evaluation board, along with all necessary software, is
available to program the AD5258 from any PC running
Windows® 98/2000/XP. The graphical user interface, as shown
in Figure 44, is straightforward and easy to use. More detailed
information is available in the user manual that comes with the
board.
V
Figure 44. AD5258 Evaluation Board Software
DD
10µF
Figure 43. Power Supply Bypassing
C2
+
0.1µF
C1
V
DD
AD5258
GND
2
C 7-bit address
LOGIC
AD5258
/2.