MCP4141-103E/SN Microchip Technology, MCP4141-103E/SN Datasheet - Page 31

• Manufacturer Part Number: MCP4141-103E/SN
• Description: IC POT DGTL SNGL 10K SPI 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP4141-103E/SN

• Memory Type: Non-Volatile
• Taps: 129
• Resistance (ohms): 10K
• Number Of Circuits: 1
• Temperature Coefficient: 150 ppm/°C Typical
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Resistance In Ohms: 10K
• End To End Resistance: 10kohm
• Resistance Tolerance: ± 20%
• No. Of Steps: 129
• Supply Voltage Range: 2.7V To 5.5V
• Control Interface: Serial, SPI
• No. Of Pots: Single
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2.2.1
This register contains 5 status bits. These bits show the
state of the WiperLock bits, the Shutdown bit the Write
Protect bit, and if an EEPROM write cycle is active. The
REGISTER 4-1:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 8-5
bit 4
bit 3
bit 2
bit 1
Note 1:
R-1
Requires a High Voltage command to modify the state of this bit (for Non-Volatile devices only). This bit is
Not directly written, but reflects the system state (for this feature).
Status (STATUS) Register
D8:D5: Reserved. Forced to “1”
EEWA: EEPROM Write Active Status bit
This bit indicates if the EEPROM Write Cycle is occurring.
1 = An EEPROM Write cycle is currently occurring. Only serial commands to the Volatile memory
0 = An EEPROM Write cycle is NOT currently occurring
WL1: WiperLock Status bit for Resistor Network 1 (Refer to Section 5.3 “WiperLock™ Technology”
for further information)
WiperLock (WL) prevents the Volatile and Non-Volatile Wiper 1 addresses and the TCON register bits
R1HW, R1A, R1W, and R1B from being written to. High Voltage commands are required to enable and
disable WiperLock Technology.
1 = Wiper and TCON register bits R1HW, R1A, R1W, and R1B of Resistor Network 1 (Pot 1) are
0 = Wiper and TCON of Resistor Network 1 (Pot 1) can be modified
WL0: WiperLock Status bit for Resistor Network 0 (Refer to Section 5.3 “WiperLock™ Technology”
for further information)
The WiperLock Technology bits (WLx) prevents the Volatile and Non-Volatile Wiper 0 addresses and the
TCON register bits R0HW, R0A, R0W, and R0B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1 = Wiper and TCON register bits R0HW, R0A, R0W, and R0B of Resistor Network 0 (Pot 0) are
0 = Wiper and TCON of Resistor Network 0 (Pot 0) can be modified
SHDN: Hardware Shutdown pin Status bit (Refer to Section 5.4 “Shutdown” for further information)
This bit indicates if the Hardware shutdown pin (SHDN) is low. A hardware shutdown disconnects the
Terminal A and forces the wiper (Terminal W) to Terminal B (see
Hardware Shutdown (the SHDN pin is low) the serial interface is operational so the STATUS register
may be read.
1 = MCP4XXX is in the Hardware Shutdown state
0 = MCP4XXX is NOT in the Hardware Shutdown state
Note:
Note:
R-1
locations are allowed (addresses 00h, 01h, 04h, and 05h)
“Locked” (Write Protected)
“Locked” (Write Protected)
STATUS REGISTER
D8:D5
The WL1 bit always reflects the result of the last programming cycle to the non-volatile WL1
bit. After a POR or BOR event, the WL1 bit is loaded with the non-volatile WL1 bit value.
The WL0 bit always reflects the result of the last programming cycle to the non-volatile WL0
bit. After a POR or BOR event, the WL0 bit is loaded with the non-volatile WL0 bit value.
W = Writable bit
‘1’ = Bit is set
R-1
R-1
MCP414X/416X/424X/426X
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EEWA
R-0
STATUS register can be accessed via the READ
commands.
register bit.
The STATUS register is placed at Address 05h.
WL1
R-x
(1)
Register 4-1
x = Bit is unknown
WL0
Figure
R-x
(1)
5-2). While the device is in
describes each STATUS
SHDN
R-x
DS22059B-page 31
WP
R-x
(1)
bit 0