MCP4131-503E/SN Microchip Technology, MCP4131-503E/SN Datasheet - Page 34
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MCP4131-503E/SN
Manufacturer Part Number
MCP4131-503E/SN
Description
IC POT DGTL SNGL 50K SPI 8SOIC
Manufacturer
Microchip Technology
Specifications of MCP4131-503E/SN
Package / Case
8-SOIC (3.9mm Width)
Taps
129
Resistance (ohms)
50K
Number Of Circuits
1
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Volatile
Interface
SPI Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Resistance In Ohms
50K
Number Of Pots
Single
Taps Per Pot
128
Resistance
50 KOhms
Wiper Memory
Volatile
Digital Interface
Serial (SPI)
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Supply Current
1 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP4131-503E/SN
Manufacturer:
Microchip
Quantity:
321
Part Number:
MCP4131-503E/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP413X/415X/423X/425X
4.2.1.1
This register contains 5 status bits. These bits show the
state of the Shutdown bit. The STATUS register can be
accessed via the READ commands.
describes each STATUS register bit.
REGISTER 4-1:
DS22060A-page 34
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 8-5
bit 4-2
bit 1
bit 0
R-1
Status (STATUS) Register
D8:D5: Reserved. Forced to “1”
RESV: Reserved
SHDN: Hardware Shutdown pin Status bit (Refer to Section 5.3 “Shutdown” for further information)
This bit indicates if the Hardware shutdown pin (SHDN) is low. A hardware shutdown disconnects the
Terminal A and forces the wiper (Terminal W) to Terminal B (see
ware Shutdown (the SHDN pin is low) the serial interface is operational so the STATUS register may be
read.
1 = MCP4XXX is in the Hardware Shutdown state
0 = MCP4XXX is NOT in the Hardware Shutdown state
RESV: Reserved
R-1
STATUS REGISTER
D8:D5
W = Writable bit
‘1’ = Bit is set
R-1
Register 4-1
R-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RESV
R-0
The STATUS register is placed at Address 05h.
RESV
R-x
Figure
x = Bit is unknown
RESV
R-x
5-2). While the device is in Hard-
© 2007 Microchip Technology Inc.
SHDN
R-x
RESV
R-x
bit 0