MAX5483EUD+ Maxim Integrated Products, MAX5483EUD+ Datasheet - Page 12

IC DGTL POT 10BIT NV 14-TSSOP

MAX5483EUD+

Manufacturer Part Number
MAX5483EUD+
Description
IC DGTL POT 10BIT NV 14-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5483EUD+

Taps
1024
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
35 ppm/°C Typical
Memory Type
Non-Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.25 V, ±2.5 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resistance In Ohms
10K
Number Of Pots
Single
Taps Per Pot
1024
Resistance
10 KOhms
Wiper Memory
Non Volatile
Buffered Wiper
Buffered
Digital Interface
3-Wire (SPI)
Operating Supply Voltage
2.7 V to 5.25 V
Supply Current
400 uA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Description/function
1024-Tap 10k Nonvolatile Linear-Taper Digital Potentiometer (Variable Resistor)
Mounting Style
SMD/SMT
Supply Voltage (max)
5.25 V
Supply Voltage (min)
2.7 V
Tolerance
25 %
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX5481/MAX5482 linear programmable voltage-
dividers and the MAX5483/MAX5484 variable resistors
feature 1024 tap points (10-bit resolution) (see the
Functional Diagrams ). These devices consist of multi-
ple strings of equal resistor segments with a wiper con-
tact that moves among the 1024 points through a
pin-selectable 3-wire SPI-compatible serial interface or
up/down interface. The MAX5481/MAX5483 provide a
total end-to-end resistance of 10kΩ, and the
MAX5482/MAX5484 have an end-to-end resistance of
50kΩ. The MAX5481/MAX5482 allow access to the
high, low, and wiper terminals for a standard voltage-
divider configuration.
10-Bit, Nonvolatile, Linear-Taper Digital
Potentiometers
12
______________________________________________________________________________________
SCLK(INC)
DIN(U/D)
GND
CS
V
V
DD
SS
Detailed Description
INTERFACE
INTERFACE
UP/DOWN
SPI
MEMORY
10-BIT
NV
POR
10-BIT
LATCH
MUX
The MAX5481/MAX5482 programmable voltage-
dividers provide a weighted average of the voltage
between the H and L inputs at the W output. Both
devices feature 10-bit resolution and provide up to
1024 tap points between the H and L voltages. Ideally,
the V
data bits are zero and the V
wiper terminal when all data bits are one. The step size
(1 LSB) voltage is equal to the voltage applied across
terminals H and L divided by 2
voltage V
Functional Diagrams (continued)
10
V
L
W
voltage occurs at the wiper terminal (W) when all
( ) =
D
DECODER
W
MAX5481/MAX5482 Programmable
as follows:
D
MAX5483
MAX5484
V
HL
10
(
V
FSE
1023
⏐ ⏐
+
V
H
ZSE
10
voltage occurs at the
. Calculate the wiper
Voltage-Dividers
)
+
L
H
V
SPI/UD
L
+
V
ZSE

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