MAX5392MAUE+ Maxim Integrated Products, MAX5392MAUE+ Datasheet - Page 10

• Manufacturer Part Number: MAX5392MAUE+
• Description: IC POT DGTL 256-TAP 16TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX5392MAUE+

• Taps: 256
• Resistance (ohms): 50K
• Number Of Circuits: 2
• Temperature Coefficient: 35 ppm/°C Typical
• Memory Type: Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Resistance In Ohms: 50K
• Number Of Pots: Dual
• Taps Per Pot: 256
• Resistance: 200 Ohms
• Wiper Memory: Volatile
• Digital Interface: I2C
• Operating Supply Voltage: 1.7 V to 5.5 V
• Supply Current: 27 uA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Description/function: Dual Volatile Low Voltage Linear Taper Digital Potentiometer
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.7 V
• Tolerance: 25 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dual, 256-Tap, Volatile, Low-Voltage,
Linear Taper Digital Potentiometer
The MAX5392 dual, 256-tap, volatile, low-voltage linear
taper digital potentiometer offers three end-to-end resis-
tance values of 10kI, 50kI, and 100kI. The potenti-
ometer consists of 255 fixed resistors in series between
terminals H_ and L_. The potentiometer wiper, W_, is
programmable to access any one of the 256 tap points
on the resistor string.
The potentiometers are programmable independently of
each other. The MAX5392 features an I
TThe MAX5392 contains an internal charge pump that
guarantees the maximum wiper resistance, R WL , to be
less than 200Ω for supply voltages down to 1.7V. Pins
H_, W_, and L_ are still required to be less than V DD +
0.3V. A bypass input, BYP, is provided to allow addi-
tional filtering of the charge-pump output, further reduc-
ing clock feedthrough that can occur on H_, W_, or L_.
The nominal clock rate of the charge pump is 600kHz.
BYP should remain resistively unloaded as any addi-
tional load would increase clock feedthrough. See the
Charge-Pump Feedthrough at W_ vs. C BYP graph in the
Typical Operating Characteristics for C BYP sizing guide-
lines with respect to clock feedthrough to the wiper. The
value of C BYP does affect the startup time of the charge
Figure 2. I
SMBus is a trademark of Intel Corp.
10
SDA
SCL
CONDITION
START
_____________________________________________________________________________________
(S)
t
HD:STA
2
C Serial-Interface Timing Diagram
t
LOW
t
SU:DAT
t
R
Detailed Description
t
HIGH
t
F
t
HD:DAT
Charge Pump
2
C interface.
t
SU:DTA
START CONDITION
REPEATD
(Sr)
pump; however, C BYP does not impact the ability to
communicate with the device, nor is there a minimum
C BYP requirement. The maximum wiper impedance
specification is not guaranteed until the charge pump is
fully settled. See the BYP Ramp Time vs. C
the Typical Operating Characteristics for C
charge-pump settling time.
The I
the command and address bytes, routing the data to the
appropriate control registers. Data written to a control
register immediately updates the wiper position. The
wipers A and B power up in midposition, D[7:0] = 80h.
The MAX5392 operates as a slave device that receives
data through an I
interface. The interface uses a serial-data access line
(SDA) and a serial-clock line (SCL) to achieve bidirec-
tional communication between master(s) and slave(s).
A master, typically a microcontroller, initiates all data
transfers to the port and generates the SCL clock that
synchronizes the data transfer. See Figure 2. Connect a
pullup resistor, typically 4.7kI, between each of the SDA
and SCL lines to a voltage between V
t
HD:STA
2
C interface contains a shift register that decodes
ACKNOWLEDGE (A)
2
C/SMBusK-compatible 2-wire serial
I
2
STOP CONDITION
C Digital Interface
t
SU:STD
(P)
Serial Addressing
DD
and 5.5V.
t
BUF
BYP
BYP
START CONDITION
impact on
graph in
(S)