MAX192AEAP+ Maxim Integrated Products, MAX192AEAP+ Datasheet - Page 17

IC ADC 10BIT SERIAL 20-SSOP

MAX192AEAP+

Manufacturer Part Number
MAX192AEAP+
Description
IC ADC 10BIT SERIAL 20-SSOP
Manufacturer
Maxim Integrated Products
Type
Data Acquisition System (DAS), ADCr
Datasheet

Specifications of MAX192AEAP+

Resolution (bits)
10 b
Sampling Rate (per Second)
133k
Data Interface
Serial
Voltage Supply Source
Single Supply
Voltage - Supply
±5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Architecture
SAR
Conversion Rate
133 KSPs
Input Type
Voltage
Maximum Power Dissipation
640 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 13. FULLPD/FASTPD Power-Up Sequence
Figure 14a. Supply Current vs. Sample Rate/Second, FULLPD,
400kHz Clock
RC filter with the internal 20kΩ reference resistor with a
0.2ms time constant. To achieve full 10-bit accuracy,
10 time constants or 2ms are required after power-up.
Waiting 2ms in FASTPD mode instead of full power-up
will reduce the power consumption by a factor of 10 or
more. This is achieved by using the sequence shown in
Figure 13.
Figure 14b shows the power consumption with
external-reference compensation in fast power-down,
with one and eight channels converted. The external
4.7µF compensation requires a 50µs wait after
power-up, accomplished by 75 idle clocks after a
dummy conversion. This circuit combines fast
multi-channel conversion with lowest power consump-
tion possible. Full power-down mode may provide
increased power savings in applications where the
DIN
VREF
REFADJ
1000
100
10
1
1
FULLPD
0
Lowest Power at Higher Throughputs
CONVERSIONS PER CHANNEL PER SECOND
2.5V
0V
4V
0V
8 CHANNELS
______________________________________________________________________________________
0 0
100
FULL POWER-DOWN
2ms FASTPD WAIT
400kHz EXTERNAL CLOCK
INTERNAL COMPENSATION
1 CHANNEL
200
300
(ZEROS)
400
500
COMPLETE CONVERSION SEQUENCE
1
= RC = 20k x C
FASTPD
2ms WAIT
0 1
REFADJ
Figure 14b. Supply Current vs. Sample Rate/Second, FASTPD,
2MHz Clock
Figure 14c. Typical Power-Up Delay vs. Time in Shutdown
Low-Power, 8-Channel,
t
BUFFEN
1
10,000
NOPD
CH1
1000
100
3.0
2.5
2.0
1.5
1.0
0.5
15 s
10
0
0.0001
1
0
Serial 10-Bit ADC
1
8 CHANNELS
CONVERSIONS PER CHANNEL PER SECOND
0.001
4k
1
FAST POWER-DOWN
TIME IN SHUTDOWN (sec)
FULLPD
2MHz EXTERNAL CLOCK
EXTERNAL COMPENSATION
50µs WAIT
CH7
0.01
8k
0 0
0.1
(ZEROS)
12k
1 CHANNEL
1
16k
1
FASTPD
10
0 1
17

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