MAX1042BETX+ Maxim Integrated Products, MAX1042BETX+ Datasheet - Page 12

• Manufacturer Part Number: MAX1042BETX+
• Description: IC ADC/DAC 10BIT W/FIFO 36TQFN
• Manufacturer: Maxim Integrated Products
• Type: ADC, DACr

Specifications of MAX1042BETX+

• Resolution (bits): 10 b
• Sampling Rate (per Second): 225k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
12
1, 2, 16–19,
15, 23, 32,
MAX1040
24, 25
9–12
______________________________________________________________________________________
13
14
33
20
21
3
4
5
6
7
8
15, 23, 32,
MAX1042
16–19
9–12
13
14
33
20
21
3
4
5
6
7
8
PIN
1, 2, 16–19,
24, 25, 31,
15, 23, 32,
MAX1046
9–12
34
13
14
33
20
21
3
4
5
6
7
8
16–19, 31,
15, 23, 32,
MAX1048
9–12
34
13
14
33
20
21
3
4
5
6
7
8
OUT0–
NAME
DGND
AGND
DOUT
DV
OUT3
LDAC
SCLK
AV
EOC
D.C.
N.C.
DIN
CS
DD
DD
Do Not Connect. Do not connect to this pin.
Active-Low End-of-Conversion Output. Data is valid after the
falling edge of EOC.
Digital Positive Power Input. Bypass DV
0.1µF capacitor.
Digital Ground. Connect DGND to AGND.
Serial Data Output. Data is clocked out on the falling edge of
the SCLK clock in clock modes 00, 01, and 10. Data is
clocked out on the rising edge of the SCLK clock in clock
mode 11. High impedance when CS is high.
Serial Clock Input. Clocks data in and out of the serial
interface. (Duty cycle must be 40% to 60%.) See Table 4 for
details on programming the clock mode.
Serial Data Input. DIN data is latched into the serial interface
on the falling edge of SCLK.
DAC Outputs
Positive Analog Power Input. Bypass AV
0.1µF capacitor.
Analog Ground
No Connection. Not internally connected.
Active-Low Load DAC. LDAC is an asynchronous active-low
input that updates the DAC outputs. Drive LDAC low to make
the DAC registers transparent.
Active-Low Chip-Select Input. When CS is low, the serial
interface is enabled. When CS is high, DOUT is high
impedance.
FUNCTION
Pin Description
DD
DD
to DGND with a
to AGND with a