AD9277BSVZ Analog Devices Inc, AD9277BSVZ Datasheet - Page 12

• Manufacturer Part Number: AD9277BSVZ
• Description: IC ADC 14BIT LNA/VGA/AAF 100TQFP
• Manufacturer: Analog Devices Inc
• Type: Ultrasound Receiversr

Specifications of AD9277BSVZ

• Resolution (bits): 14 b
• Data Interface: Serial, SPI™
• Sampling Rate (per Second): 10M ~ 50M
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8V, 3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Sampling Rate: 50MSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Supply Current: 365mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9277
Pin No.
23
24
26, 47
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
48
49
51
52
53
56
57
58
59
62
63
64
65
68
69
70
71
74
75
76
77
78
79
80
81
82
83
84
87
88
Name
CLK−
CLK+
DRVDD
DOUTH−
DOUTH+
DOUTG−
DOUTG+
DOUTF−
DOUTF+
DOUTE−
DOUTE+
DCO−
DCO+
FCO−
FCO+
DOUTD−
DOUTD+
DOUTC−
DOUTC+
DOUTB−
DOUTB+
DOUTA−
DOUTA+
STBY
PDWN
SCLK
SDIO
CSB
LG-A
LI-A
LOSW-A
LO-A
LG-B
LI-B
LOSW-B
LO-B
LG-C
LI-C
LOSW-C
LO-C
LG-D
LI-D
LOSW-D
LO-D
GPO0
GPO1
GPO2
GPO3
RESET
4LO−
4LO+
GAIN−
GAIN+
Description
Clock Input Complement.
Clock Input True.
1.8 V Digital Output Driver Supply.
ADC H Digital Output Complement.
ADC H Digital Output True.
ADC G Digital Output Complement.
ADC G Digital Output True.
ADC F Digital Output Complement.
ADC F Digital Output True.
ADC E Digital Output Complement.
ADC E Digital Output True.
Digital Clock Output Complement.
Digital Clock Output True.
Digital Frame Clock Output Complement.
Digital Frame Clock Output True.
ADC D Digital Output Complement.
ADC D Digital Output True.
ADC C Digital Output Complement.
ADC C Digital Output True.
ADC B Digital Output Complement.
ADC B Digital Output True.
ADC A Digital Output Complement.
ADC A Digital Output True.
Standby Power-Down.
Full Power-Down.
Serial Clock.
Serial Data Input/Output.
Chip Select Bar.
LNA Ground for Channel A.
LNA Analog Input for Channel A.
LNA Analog Switched Output for Channel A.
LNA Analog Inverted Output for Channel A.
LNA Ground for Channel B.
LNA Analog Input for Channel B.
LNA Analog Switched Output for Channel B.
LNA Analog Inverted Output for Channel B.
LNA Ground for Channel C.
LNA Analog Input for Channel C.
LNA Analog Switched Output for Channel C.
LNA Analog Inverted Output for Channel C.
LNA Ground for Channel D.
LNA Analog Input for Channel D.
LNA Analog Switched Output for Channel D.
LNA Analog Inverted Output for Channel D.
General-Purpose Open-Drain Output 0.
General-Purpose Open-Drain Output 1.
General-Purpose Open-Drain Output 2.
General-Purpose Open-Drain Output 3.
Reset for Synchronizing 4LO Divide-by-4 Counter.
CW Doppler 4LO Input Complement.
CW Doppler 4LO Input True.
Gain Control Voltage Input Complement.
Gain Control Voltage Input True.
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