AD7745ARUZ Analog Devices Inc, AD7745ARUZ Datasheet - Page 19

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AD7745ARUZ

Manufacturer Part Number
AD7745ARUZ
Description
IC CONV 1CH CAP TO DGTL 16TSSOP
Manufacturer
Analog Devices Inc
Type
Capacitance-to-Digital Converterr
Datasheet

Specifications of AD7745ARUZ

Design Resources
Extending the Capacitive Input Range of AD7745/AD7746 (CN0129)
Resolution (bits)
24 b
Data Interface
Serial
Voltage Supply Source
Single Supply
Voltage - Supply
2.7 V ~ 5.25 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Supply Current
750µA
Power Dissipation Pd
4.25mW
Inl ±
100ppm
Sample Rate
90SPS
Supply Voltage Max
5.25V
Input Channels Per Adc
1
No. Of Bits
24 Bit
Features
24Bit Capacitance To Digital Convert I.C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sampling Rate (per Second)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7745ARUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
CAP DAC A REGISTER
Address Pointer 0x0B, Default Value 0x00
Capacitive DAC setup.
Table 19. Cap DAC A Register Bit Map
Bit
Mnemonic
Default
Table 20.
Bit
7
6-1
CAP DAC B REGISTER
Address Pointer 0x0C, Default Value 0x00
Capacitive DAC setup.
Table 21. Cap DAC B Register Bit Map
Bit
Mnemonic
Default
Table 22.
Bit
7
6-1
CAP OFFSET CALIBRATION REGISTER
16 Bits, Address Pointer 0x0D, 0x0E,
Default Value 0x8000
The capacitive offset calibration register holds the capacitive
channel zero-scale calibration coefficient. The coefficient is
used to digitally remove the capacitive channel offset. The
register value is updated automatically following the execution
of a capacitance offset calibration. The capacitive offset calibra-
tion resolution (cap offset register LSB) is less than 32 aF; the
full range is 1 pF.
On the AD7746, the register is shared by the two capacitive
channels. If the capacitive channels need to be offset-calibrated
individually, the host controller software should read the
AD7746 capacitive offset calibration register values after
performing the offset calibration on individual channels and
then reload the values back to the AD7746 before executing
conversion on a different channel.
Mnemonic
DACAENA
DACA
Mnemonic
DACBENB
DACB
Bit 7
DACAENA
0
Description
DACAENA = 1 connects capacitive DACA to the positive capacitance input.
DACA value, Code 0x00 ≈ 0 pF, Code 0x7F ≈ full range.
Bit 7
DACBENB
0
Description
DACBENB = 1 connects capacitive DACB to the negative capacitance input.
DACB value, Code 0x00 ≈ 0 pF, Code 0x7F ≈ full range.
Bit 6
Bit 6
Bit 5
Bit 5
Rev. 0| Page 19 of 28
Bit 4
Bit 4
CAP GAIN CALIBRATION REGISTER
16 Bits, Address Pointer 0x0F, 0x10,
Default Value 0xXXXX
Capacitive gain calibration register. The register holds the
capacitive channel full-scale factory calibration coefficient.
On the AD7746, the register is shared by the two capacitive
channels.
VOLT GAIN CALIBRATION REGISTER
16 Bits, Address Pointer 0x11,0x12,
Default Value 0xXXXX
Voltage gain calibration register. The register holds the voltage
channel full-scale factory calibration coefficient.
DACA—7-Bit Value
DACB—7-bit value
Bit 3
Bit 3
0x00
0x00
Bit 2
Bit 2
Bit 1
Bit 1
AD7745/AD7746
Bit 0
Bit 0

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