LM12458CIV/NOPB National Semiconductor, LM12458CIV/NOPB Datasheet - Page 34

• Manufacturer Part Number: LM12458CIV/NOPB
• Description: IC ACQUISITION SYS 12BIT 44-PLCC
• Manufacturer: National Semiconductor
• Type: Data Acquisition System (DAS)r

Specifications of LM12458CIV/NOPB

• Resolution (bits): 12 b
• Sampling Rate (per Second): 140k
• Data Interface: Parallel
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM12458CIV; *LM12458CIV/NOPB; LM12458CIV

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6.0 Design Considerations
niques). Failure to do so can result in erratic operation.
Generally, a series 30Ω to 50Ω resistor in the clock line,
located as close to the clock source as possible, will prevent
most problems. The clock source should drive ONLY the
LM12(H)458 clock pin.
7.0 Common Application Problems
Driving the analog inputs with op-amp(s) powered from
supplies other than the supply used for the LM12(H)458.
This practice allows for the possibility of the amplifier output
(LM12(H)458 input) to reach potentials outside of the 0V to
V
amplifier use supply voltages outside of the range of the
LM12(H)458 supply rails. This could also happen upon
power up if the amplifier supply or supplies ramp up faster
than the supply of the LM12(H)458. If any pin experiences a
potential more than 100 mV below ground or above the
supply voltage, even on a fast transient basis, the result
could be erratic operation, missing codes, one channel in-
teracting with one or more of the others, skipping channels
or a complete malfunction, depending upon how far the input
is driven beyond the supply rails.
Not performing a full calibration at power up. This can
result in missing codes. The device needs to have a full
calibration run and completed after power up and BEFORE
attempting to perform even a single conversion or watchdog
operation. The only way to recover if this is violated is to
interrupt the power to the device.
Not waiting for the calibration process to complete be-
fore trying to write to the device. Once a calibration is
requested, the ONLY read of the LM12(H)458 should be if
the Interrupt Status Register to check for a completed cali-
bration. Attempting a write or any other read during calibra-
tion would cause a corruption of the calibration process,
resulting in missing codes. The only way to recover would be
to interrupt the power.
A
+ range. This could happen in normal operation if the
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Improper termination of digital lines. Improper termination
can result in energy reflections that build up to cause over-
shoot that goes above the supply potential and undershoot
that goes below ground. It is never good to drive a device
beyond the supply rails, unless the device is specifically
designed to handle this situation, but the LM12(H)458 is
more sensitive to this condition that most devices. Again, if
any pin experiences a potential more than 100 mV below
ground or above the supply voltage, even on a fast transient
basis, the result could be erratic operation, missing codes, or
a complete malfunction, depending upon how far the input is
driven beyond the supply rails. The clock input is the most
sensitive digital one. Generally, a 50Ω series resistor, lo-
cated very close to the signal source, will keep digital lines
"clean".
Excessive output capacitance on the digital lines. The
current required to charge the capacitance on the digital
outputs can cause noise on the supply bus within the
LM12(H)458, causing internal supply "bounce" even when
the external supply pin is pretty stable. The current required
to discharge the output capacitance can cause die ground
"bounce". Either of these can cause noise to be induced at
the analog inputs, resulting in conversion errors.
Output capacitance should be limited as much as possible. A
series 100Ω resistor in each digital output line, located very
close to the output pin, will limit the charge and discharge
current, minimizing the extent of the conversion errors.
Improper CS decoding. If address decoder is used, care
must be exercised to ensure that no "runt" (very narrow)
pulse is produced on theCS line when trying to address
another device or memory. Even sub-nanosecond spikes on
the CS line can cause the chip to be reprogrammed in
accordance with what happens to be on the data lines at the
time. The result is unexpected operation. The worst case
result is that the device is put into the "Test" mode and the
on-board EEPROM that corrects linearity is corrupted. If this
happens, the only recourse is to replace the device.