AD7895BR-2 Analog Devices Inc, AD7895BR-2 Datasheet - Page 3

• Manufacturer Part Number: AD7895BR-2
• Description: IC ADC 12BIT SRL 5V 8-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7895BR-2

• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 20mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)

TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
NOTES
1
2
3
4
ABSOLUTE MAXIMUM RATINGS*
(T
V
Analog Input Voltage to GND
Reference Input Voltage to GND . . . . –0.3 V to V
Digital Input Voltage to GND . . . . . . . –0.3 V to V
Digital Output Voltage to GND . . . . . –0.3 V to V
Operating Temperature Range
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150 C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
Model
AD7895AN-2
AD7895AR-2
AD7895BR-2
AD7895AN-10
AD7895AR-10
AD7895BR-10
AD7895AN-3
AD7895AR-3
*N = Plastic DIP, SO = SOIC.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7895 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
The SCLK maximum frequency is 15 MHz. Care must be taken when interfacing to account for the data access time, t
1
2
3
4
5
6
Sample tested at +25 C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.4 V.
processor. These two times will determine the maximum SCLK frequency that the user’s system can operate with. See “Serial Interface” section for more information.
Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.0 V.
Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
of the part and, as such, is independent of external bus loading capacitances.
DD
A
AD7895-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AD7895-2, AD7895-3 . . . . . . . . . . . . . . . . . . . –5 V, +10 V
Commercial (A, B Versions) . . . . . . . . . . . –40 C to +85 C
Storage Temperature Range . . . . . . . . . . . –65 C to +150 C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . +260 C
Lead Temperature, Soldering
= +25 C unless otherwise noted)
JA
JA
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215 C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220 C
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 130 C/W
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 170 C/W
A, B Versions
40
35
35
60
10
50
2
2
3
4
Temperature Range
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +125 C
–40 C to +85 C
1, 2
(V
DD
Units
ns min
ns min
ns min
ns max
ns min
ns max
= +5 V, GND = 0 V, REF IN = +2.5 V)
DD
DD
DD
+ 0.3 V
+ 0.3 V
+ 0.3 V
ORDERING GUIDE
Linearity Error (LSB)
1 LSB
1 LSB
1 LSB
1 LSB
1 LSB
1 LSB
1 LSB
1 LSB
17 V
–3–
Test Conditions/Comments
CONVST Pulse Width
SCLK High Pulse Width
SCLK Low Pulse Width
Data Access Time after Falling Edge of SCLK, V
Data Hold Time after Falling Edge of SCLK
Bus Relinquish Time after Falling Edge of SCLK
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Figure 1. Load Circuit for Access Time and Bus
Relinquish Time
6
, quoted in the timing characteristics is the true bus relinquish time
OUTPUT
PIN
TO
SNR (dB)
70 dB
70 dB
70 dB
70 dB
70 dB
70 dB
70 dB
70 dB
50pF
4
, and the setup time required for the user's
WARNING!
2.0mA
2.0mA
Package Option*
N-8
SO-8
SO-8
N-8
SO-8
SO-8
N-8
SO-8
+1.6V
ESD SENSITIVE DEVICE
DD
AD7895
= 5 V
5%