AD7885BQ Analog Devices Inc, AD7885BQ Datasheet - Page 10

• Manufacturer Part Number: AD7885BQ
• Description: IC ADC 16BIT SAMPLING HS 28-CDIP
• Manufacturer: Analog Devices Inc

Specifications of AD7885BQ

• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Sampling Rate (per Second): 166k
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 325mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 28-CDIP (0.600", 15.24mm)

Table I. Ideal Output Code Table for the AD7884/AD7885
AD7884/AD7885
In Terms of FSR
+FSR/2 – 1 LSB
+FSR/2 – 2 LSBs
+FSR/2 – 3 LSBs
AGND + 1 LSB
AGND
AGND – 1 LSB
–(FSR/2 – 3 LSBs) –2.999726
–(FSR/2 – 2 LSBs) –2.999817
–(FSR/2 – 1 LSB)
NOTES
1
2
3
4
USING THE AD7884/AD7885 ANALOG INPUT RANGES
The AD7884/AD7885 can be set up to have either a ± 3 V analog
input range or a ± 5 V analog input range. Figures 10 and 11 show
the necessary corrections for each of these. The output code is
twos complement and the ideal code table for both input ranges
is shown in Table I.
Reference Considerations
The AD7884/AD7885 operates from a ± 3 V reference. This can
be derived simply using the AD780 as shown in Figure 6.
The critical performance specification for a reference in a 16-bit
application is noise. The reference peak-to-peak noise should be
insignificant in comparison to the ADC noise. The AD7884/AD7885
has a typical rms noise of 120 µV. For example, a reasonable
target would be to keep the total rms noise less than 125 µV.
This table applies for V
FSR (full-scale range) is 6 V for the ± 3 V input range and 10 V for the
1 LSB on the ± 3 V range is FSR/2
1 LSB on the ± 5 V range is FSR/2
± 5 V input range.
Figure 11. ± 3 V Input Range Connections
Figure 10. ± 5 V Input Range Connection
V
Analog Input
V
INV
INV
2
Range
2.999908
2.999817
2.999726
0.000092
0.000000
–0.000092
–2.999908
REF+
3 V
S = 3 V.
3
A1
A1
16
16
0.000000
and is equal to 91.5 µV.
and is equal to 152.6 µV.
Range
4.999847
4.999695
4.999543
0.000153
–0.000153
–4.999543
–4.999695
–4.999847
5 V
4
5V
5V
3V
3V
5V
5V
3V
3V
IN
IN
IN
IN
IN
IN
IN
IN
011 . . . 111 to 111 . . . 110
011 . . . 110 to 011 . . . 101
011 . . . 101 to 011 . . . 100
000 . . . 001 to 000 . . . 000
000 . . . 000 to 111 . . . 111
111 . . . 111 to 111 . . . 110
100 . . . 011 to 100 . . . 010
100 . . . 010 to 100 . . . 001
100 . . . 001 to 100 . . . 000
Digital Output
Code Transition
S
F
S
F
S
F
S
F
l
–10–
To do this the reference noise needs to be less than 35 µV rms.
In the 100 kHz band, the AD780 noise is less than 30 µV rms,
making it a very suitable reference.
The buffer amplifier used to drive the device V
low enough noise performance so as not to affect the overall
system noise requirement. The AD845 and AD817 achieve this.
Decoupling and Grounding
The AD7884 and AD7885A have one AV
pins. They also have one AV
AD7885 has one AV
one V
be used for the positive supply pins and a common –5 V supply
for the negative supply pins.
For decoupling purposes, the critical pins on both devices are
the AV
system AGND with 10 µF tantalum and 0.1 µF ceramic capaci-
tors right at the pins. With the V
to decouple each of these with ceramic 1 µF capacitors.
AGNDS, AGNDF are the ground return points for the on-chip
9-bit ADC. They should be driven by a buffer amplifier as shown
in Figure 6. If they are tied directly together and then to ground,
there will be a marginal degradation in linearity performance.
The GND pin is the analog ground return for the on-chip lin-
ear circuitry. It should be connected to system analog ground.
The DGND pin is the ground return for the on-chip digital
circuitry. It should be connected to the ground terminal of the
V
AV
mon ground point.
Power Supply Sequencing
AV
typically 17 Ω resistance between them. If they are powered by
separate 5 V supplies, then these should come up simultaneously.
Otherwise, the one that comes up first will have to drive 5 V
into a 17 Ω load for a short period of time. However, the standard
short-circuit protection on regulators like the 7800 series will
ensure that there is no possibility of damage to the driving device.
AV
time as V
should be used to ensure that V
more than 0.3 V. Arranging the power supplies as in Figure 6
and using the recommended decoupling ensures that there
are no power supply sequencing issues as well as giving the
specified noise performance.
DD
Figure 12. Schottky Diodes Used to Protect Against
Incorrect Power Supply Sequencing
DD
DD
SS
and V
SS
should always come up either before or at the same
and V
and V
DD
pin. Figure 6 shows how a common +5 V supply should
SS
and AV
SS
. If this cannot be guaranteed, Schottky diodes
DD
DD
AV
+5V
supplies. If a common analog supply is used for
, then DGND should be connected to the com-
DD
are connected to a common substrate and there is
SS
AD7884/AD7885
+5V
V
pins. Each of these should be decoupled to
DD
DD
pin, one V
AV
–5V
SS
SS
pin and three V
DD
SS
DD
–5V
V
never exceeds AV
and V
SS
pin, one AV
HP5082-2810
OR
EQUIVALENT
SS
DD
pins, it is sufficient
pin and two V
REF+
SS
SS
pins. The
should have
pin, and
SS
by
REV. E
DD