AD7490BCP Analog Devices Inc, AD7490BCP Datasheet - Page 7
![IC ADC 12BIT 16CH 32-LFCSP](/photos/6/49/64957/505-32-lfcsp_sml.jpg)
AD7490BCP
Manufacturer Part Number
AD7490BCP
Description
IC ADC 12BIT 16CH 32-LFCSP
Manufacturer
Analog Devices Inc
Datasheet
1.AD7490BRUZ.pdf
(28 pages)
Specifications of AD7490BCP
Number Of Bits
12
Sampling Rate (per Second)
1M
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
12.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, CSP Exposed Pad
For Use With
EVAL-AD7490CBZ - BOARD EVAL CONTROL FOR AD7490
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD7490BCP
Manufacturer:
ADI
Quantity:
240
Part Number:
AD7490BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD7490BCPZ-REEL7
Manufacturer:
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Quantity:
200
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
TSSOP
20
23
22
14, 21, 24
13 to 5,
3 to 1,
28 to 25
19
15
16
17
Pin No.
LFCSP
18
21
20
12, 19, 22
11 to 9,
7 to 2,
31 to 26,
24
17
13
14
15
Figure 3. 28-Lead TSSOP Pin Configuration
AGND
NC = NO CONNECT
ALL NC PINS SHOULD BE
CONNECTED STRAIGHT TO AGND
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
NC
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
11
10
9
8
7
6
5
4
3
2
1
0
10
11
12
13
14
1
2
3
4
5
6
7
8
9
(Not to Scale)
Mnemonic
CS
REF
V
AGND
V
DIN
DOUT
SCLK
V
AD7490
TOP VIEW
DD
IN
DRIVE
0 to V
IN
IN
15
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
V
V
V
AGND
REF
V
AGND
CS
DIN
NC
V
SCLK
DOUT
IN
IN
IN
IN
DD
DRIVE
12
13
14
15
IN
Description
Chip Select. Active low logic input. This input provides the dual function of initiating
conversions on the AD7490 and also frames the serial data transfer.
Reference Input for the AD7490. An external reference must be applied to this input. The
voltage range for the external reference is 2.5 V ± 1% for specified performance.
Power Supply Input. The V
range, V
Analog Ground. Ground reference point for all circuitry on the AD7490. All analog/digital input
signals and any external reference signal should be referred to this AGND voltage. All AGND pins
should be connected together.
Analog Input 0 through Analog Input 15. Sixteen single-ended analog input channels that are
multiplexed into the on chip track-and-hold. The analog input channel to be converted is
selected by using the address bits ADD3 through ADD0 of the control register. The address bits,
in conjunction with the SEQ and SHADOW bits, allow the sequence register to be programmed.
The input range for all input channels can extend from 0 V to REF
via the RANGE bit in the control register. Any unused input channels should be connected to
AGND to avoid noise pickup.
Data In. Logic input. Data to be written to the control register of the AD7490 is provided on this
input and is clocked into the register on the falling edge of SCLK (see the Control Register
section).
Data Out. Logic output. The conversion result from the AD7490 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data
stream consists of four address bits indicating which channel the conversion result corresponds
to, followed by the 12 bits of conversion data, which is provided by MSB first. The output coding
can be selected as straight binary or twos complement via the CODING bit in the control
register.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This
clock input is also used as the clock source for the conversion process of the AD7490.
Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial
interface of the AD7490 operates.
DD
should be from 4.75 V to 5.25 V.
Rev. C | Page 7 of 28
DD
range for the AD7490 is from 2.7 V to 5.25 V. For the 0 V to 2 × REF
V
V
V
V
V
V
NC = NO CONNECT
ALL NC PINS SHOULD BE
CONNECTED STRAIGHT TO AGND
NC
NC
IN
IN
IN
IN
IN
IN
8
7
6
5
4
3
1
2
3
4
5
6
7
8
Figure 4. 32-Lead LFCSP Pin Configuration
32
9
31
10
30
11
(Not to Scale)
AD7490
TOP VIEW
29
12
28
13
IN
27
14
or 0 V to 2 × REF
26
15
25
16
24
23
22
21
20
19
18
17
V
NC
AGND
REF
V
AGND
CS
DIN
IN
DD
IN
15
IN
AD7490
as selected
IN