AS1524-BTDR austriamicrosystems, AS1524-BTDR Datasheet - Page 11

• Manufacturer Part Number: AS1524-BTDR
• Description: IC A/D 12-BIT 1-CH 150K 8-TDFN
• Manufacturer: austriamicrosystems

Specifications of AS1524-BTDR

• Number Of Bits: 12
• Sampling Rate (per Second): 150k
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-WDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AS1524/AS1525
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1524/AS1525 employ a successive approximation conversion (SAR) technique and integrated track/hold cir-
cuitry to convert analog signals into 12-bit digital output. The serial interface provides easy interfacing to microproces-
sors.
(1-channel, true differential).
True Differential Analog Input Track/Hold
The equivalent circuit of
multiplexer, comparator, and switched-capacitor DAC. The track/hold circuitry enters its tracking mode on the rising
edge of CNVST. The positive input capacitor is connected to AIN1 or AIN2 (AS1525) or AIN+ (AS1524). The negative
input capacitor is connected to GND (AS1525) or AIN- (AS1524).
Figure 18. Equivalent Input Circuit
The track/hold circuitry enters its hold mode on the falling edge of CNVST and the difference between the sampled
positive and negative input voltages is converted. The time required for the track/hold to acquire an input signal is
determined by how quickly its input capacitance is charged. If the input signal’s source impedance is high, the acquisi-
tion time lengthens, and CNVST must be held high for a longer period of time. The acquisition time (
mum time needed for the signal to be acquired, plus the power-up time.
Where:
R
R
t
Note:
Selecting AIN1 or AIN2 (AS1525)
Select one of the AS1525 two positive input channels using the CNVST pin
ure
nected to the positive input capacitor. Hold CNVST high for
the track/hold circuitry in hold mode. The AS1525 then performs a conversion and shutdown automatically. The MSB is
available at DOUT after 3.7µs. Data can then be clocked out using SCLK. Clock out all 12 bits of data before driving
CNVST high for the next conversion. If all 12 bits of data are not clocked out before CNVST is driven high, AIN2 is
selected for the next conversion.
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PWR
S
IN
is the source impedance of the input signal;
19), drive CNVST high to power up the AS1525 and place the track/hold circuitry in track mode with AIN1 con-
= 1.5kΩ;
of 1µs is the power-up time of the device.
Figure 18
tACQ
AS1525 AC performance. A high-impedance source can be accommodated either by lengthening
placing a 1µF capacitor between the positive and negative analog inputs.
is never less than 1.4µs and any source impedance below 300. does not significantly affect the AS1524/
AIN1/AIN+
GND/AIN-
shows the simplified internal structure for the AS1525 (2-channels, single ended) and the AS1524
AIN2
Figure 18
shows the device input architecture which is composed of track/hold circuitry, input
t
ACQ
Hold
= 9 x (R
S
+ R
Revision 1.02
GND
REF
IN
) x 20pF + t
V
tACQ
Hold
DD/2
C
C
IN+
IN-
12-Bit Capacitive DAC
to fully acquire the signal. Drive CNVST low to place
R
IN-
PWR
tACQ
Track
(see page
is calculated by:
R
IN+
3). If AIN1 is selected
Hold
Comparator
+
–
tACQ)
is the maxi-
tACQ
(see Fig-
or by
11 - 22
(EQ 1)