AD9251BCPZ-80 Analog Devices Inc, AD9251BCPZ-80 Datasheet - Page 3
![IC ADC 14BIT 80MSPS 64LFCSP](/photos/18/99/189913/4243362_sml.jpg)
AD9251BCPZ-80
Manufacturer Part Number
AD9251BCPZ-80
Description
IC ADC 14BIT 80MSPS 64LFCSP
Manufacturer
Analog Devices Inc
Datasheet
1.AD9251BCPZRL7-20.pdf
(36 pages)
Specifications of AD9251BCPZ-80
Data Interface
Serial, SPI™
Number Of Bits
14
Sampling Rate (per Second)
80M
Number Of Converters
2
Power Dissipation (max)
173mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Resolution (bits)
14bit
Sampling Rate
80MSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
1.7V To 1.9V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9251BCPZ-80
Manufacturer:
ADI/亚德诺
Quantity:
20 000
GENERAL DESCRIPTION
The AD9251 is a monolithic, dual-channel, 1.8 V supply,
14-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital
converter (ADC). It features a high performance sample-and-
hold circuit and on-chip voltage reference.
The product uses multistage differential pipeline architecture
with output error correction logic to provide 14-bit accuracy at
80 MSPS data rates and to guarantee no missing codes over the
full operating temperature range.
The ADC contains several features designed to maximize
flexibility and minimize system cost, such as programmable
clock and data alignment and programmable digital test pattern
generation. The available digital test patterns include built-in
deterministic and pseudorandom patterns, along with custom
user-defined test patterns entered via the serial port interface (SPI).
Rev. A | Page 3 of 36
A differential clock input controls all internal conversion cycles.
An optional duty cycle stabilizer (DCS) compensates for wide
variations in the clock duty cycle while maintaining excellent
overall ADC performance.
The digital output data is presented in offset binary, gray code,
or twos complement format. A data output clock (DCO) is
provided for each ADC channel to ensure proper latch timing
with receiving logic. Both 1.8 V and 3.3 V CMOS levels are
supported and output data can be multiplexed onto a single
output bus.
The AD9251 is available in a 64-lead RoHS Compliant LFCSP
and is specified over the industrial temperature range (−40°C
to +85°C).
AD9251