AD7858AN Analog Devices Inc, AD7858AN Datasheet

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GENERAL DESCRIPTION The AD7858/AD7858L are high-speed, low-power, 12-bit ADCs that operate from a single power supply, the AD7858 being optimized for speed and the AD7858L for low power. The ADC powers up with a ...

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AD7858/AD7858L–SPECIFICATIONS Reference unless otherwise noted MHz (1.8 MHz B Grade ( +70 C), 1 MHz A and B Grades (– +85 C) for L Version); f CLKIN 200 kHz (AD7858), 100 kHz (AD7858L); ...

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Parameter A Version DYNAMIC PERFORMANCE AV DV +3.0/+5.5 DD Normal Mode 6 (1.9) 5.5 (1.9) 6 Sleep Mode With External Clock On 10 400 With External Clock Off 5 200 Normal-Mode Power Dissipation 33 (10.5) 20 ...

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AD7858/AD7858L 1 TIMING SPECIFICATIONS Limit MIN (A, B Versions) Parameter 500 500 CLKIN 4 4 1.8 1 SCLK 3 t 100 100 ...

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TYPICAL TIMING DIAGRAMS Figures 2 and 3 show typical read and write timing diagrams for serial Interface Mode 2. The reading and writing occurs after conversion in Figure 2, and during conversion in Figure 3. To attain the maximum sample ...

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... AD7858/AD7858L features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Linearity Power Error 1 Model (LSB) ± 1 AD7858AN ± 1/2 AD7858BN ± AD7858LAN ± AD7858LBN ± 1 AD7858AR ± ...

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Pin Mnemonic Description CONVST 1 Convert Start. Logic Input. A low to high transition on this input puts the track/hold into its hold mode and starts conversion. When this input is not used, it should be tied to DV Busy ...

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AD7858/AD7858L 1 TERMINOLOGY Integral Nonlinearity This is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The end- points of the transfer function are zero scale, a point 1/2 LSB below the first ...

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ON-CHIP REGISTERS The AD7858/AD7858L powers up with a set of default conditions. The only writing required is to select the channel configuration. Without performing any other write operations the AD7858/AD7858L still retains the flexibility for performing a full power-down and ...

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AD7858/AD7858L CONTROL REGISTER The arrangement of the Control Register is shown below. The control register is a write only register and contains 14 bits of data. The control register is selected by putting two 1s in ADDR1 and ADDR0. The ...

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SGL/DIFF *AIN(+) refers to the positive input seen by the AD7858/AD7858L sample and hold circuit, *AIN(–) refers to the negative input seen by the ...

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AD7858/AD7858L STATUS REGISTER The arrangement of the Status Register is shown below. The status register is a read-only register and contains 16 bits of data. The status register is selected by first writing to the control register and putting two ...

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CALIBRATION REGISTERS The AD7858/AD7858L has 10 calibration registers in all, eight for the DAC, one for the offset, and one for gain. Data can be written to or read from all 10 calibration registers. In self- and system calibration the ...

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AD7858/AD7858L START WRITE TO CONTROL REGISTER SETTING STCAL = 0, RDSLT1 = 1, RDSLT0 = 0, AND CALSLT1, CALSLT0 = 00, 01, 10, 11 CAL REGISTER POINTER IS AUTOMATICALLY RESET READ CAL REGISTER CAL REGISTER POINTER IS AUTOMATICALLY INCREMENTED LAST ...

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CIRCUIT INFORMATION The AD7858/AD7858L is a fast, 12-bit single supply A/D con- verter. The part requires an external 4 MHz/1.8 MHz master capacitors, a CONVST signal to start clock (CLKIN), two C REF conversion, and power supply decoupling capacitors. The ...

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AD7858/AD7858L require approximately 150 ms for the internal reference to settle and for the automatic calibration on power- completed. For applications where power consumption is a major concern then the SLEEP pin can be connected to DGND. See ...

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Input Range The analog input range for the AD7858/AD7858L The AIN(–) pin on the AD7858/AD7858L can be biased REF up above AGND, if required. The advantage of biasing the lower end of the analog ...

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AD7858/AD7858L PERFORMANCE CURVES Figure 18 shows a typical FFT plot for the AD7858 at 200 kHz sample rate and 10 kHz input frequency SAMPLE – SNR = 72.04dB THD = –88.43dB –40 –60 –80 –100 ...

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Table VI. Power Management Options PMGT1 PMGT0 SLEEP Bit Bit Pin Comment Full Power-Down if Not Calibrating or Converting (Default Condition After Power-On Normal Operation Normal Operation (Independent of the SLEEP ...

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AD7858/AD7858L The recommended value of the external capacitor is 100 nF; this gives a power-up time of approximately 135 ms before a calibration is initiated and normal operation should commence. When C is fully charged, the power-up time from a ...

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Automatic Calibration on Power-On The CAL pin has a 0.15 µA pull-up current source connected to it internally to allow for an automatic full self-calibration on power-on. A full self-calibration will be initiated on power- capacitor is connected ...

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AD7858/AD7858L Figure 27 shows a system gain calibration (assuming a system full scale greater than the reference voltage) where the analog input range has been increased after the system gain calibration is completed. A system full-scale voltage less than the ...

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The timing diagram for a system offset or system gain calibra- tion is shown in Figure 30. Here again the CAL is pulsed and the rising edge of the CAL initiates the calibration sequence (or the calibration can be initiated ...

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AD7858/AD7858L DETAILED TIMING SECTION Mode 1 (2-Wire 8051 Interface) The read and writing takes place on the DIN line and the con- version is initiated by pulsing the CONVST pin (note that in every write cycle the 2/3 MODE bit ...

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Mode 2 (3-Wire SPI/QSPI Interface Mode) This is the DEFAULT INTERFACE MODE. In Figure 33 below we have the timing diagram for interface Mode 2 which is the SPI/QSPI interface mode. Here the SYNC input is active low and may ...

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AD7858/AD7858L CONFIGURING THE AD7858/AD7858L The AD7858/AD7858L contains 14 on-chip registers which can be accessed via the serial interface. In the majority of applications it will not be necessary to access all of these registers. Here the CLKIN signal is applied ...

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Interface Mode 2 Configuration Figure 35 shows the flowchart for configuring the part in Inter- face Mode 2. In this case the read and write operations take place simultaneously via the serial port. Writing all 0s ensures WAIT APPROX 200ns ...

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AD7858/AD7858L MICROPROCESSOR INTERFACING In many applications, the user may not require the facility of writing to most of the on-chip registers. The only writing neces- sary is to set the input channel configuration. After this the CONVST is applied, a ...

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A typical sequence of events would be to write to the control register via the DIN line setting a conversion start and at the same time reading data from the previous conversion on the DOUT line (both the read and ...

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AD7858/AD7858L APPLICATION HINTS Grounding and Layout The analog and digital supplies to the AD7858/AD7858L are independent and separately pinned out to minimize coupling between the analog and digital sections of the device. The part has very good immunity to noise ...

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PAGE INDEX Topic FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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AD7858/AD7858L 0.02 (0.5) 0.016 (0.41) 0.01 (0.254) 0.006 (0.15) 0.008 (0.203) 0.002 (0.050) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Lead Plastic DIP (N-24) 1.228 (31.19) 1.226 (31.14 0.260 0.001 (6.61 0.03 PIN 1 0.130 ...