CS5361-DZZ Cirrus Logic Inc, CS5361-DZZ Datasheet - Page 3

• Manufacturer Part Number: CS5361-DZZ
• Description: IC ADC AUD 114DB 204KHZ 24-TSSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5361-DZZ

• Data Interface: Serial
• Number Of Bits: 24
• Sampling Rate (per Second): 204k
• Number Of Converters: 2
• Power Dissipation (max): 235mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Resolution (bits): 24bit
• Sampling Rate: 192kSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Supply Current: 22mA
• Digital Ic Case Style: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1547 - BOARD EVAL FOR CS5361 STEREO ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1695

LIST OF FIGURES
LIST OF TABLES
DS467F2
Figure 1. Single Speed Mode Stopband Rejection ..................................................... 8
Figure 2. Single Speed Mode Transition Band ........................................................... 8
Figure 3. Single Speed Mode Transition Band (Detail) .............................................. 8
Figure 4. Single Speed Mode Passband Ripple ......................................................... 8
Figure 5. Double Speed Mode Stopband Rejection ................................................... 8
Figure 6. Double Speed Mode Transition Band ......................................................... 8
Figure 7. Double Speed Mode Transition Band (Detail) ............................................. 9
Figure 8. Double Speed Mode Passband Ripple ....................................................... 9
Figure 9. Quad Speed Mode Stopband Rejection ...................................................... 9
Figure 10. Quad Speed Mode Transition Band .......................................................... 9
Figure 11. Quad Speed Mode Transition Band (Detail) ............................................. 9
Figure 12. Quad Speed Mode Passband Ripple ........................................................ 9
Figure 13. Master Mode, Left Justified SAI .............................................................. 12
Figure 14. Slave Mode, Left Justified SAI ................................................................ 12
Figure 15. Master Mode, I
Figure 16. Slave Mode, I
Figure 17. OVFL Output Timing ............................................................................... 12
Figure 18. Left Justified Serial Audio Interface ......................................................... 13
Figure 19. I
Figure 20. OVFL Output Timing, I2S Format ............................................................ 13
Figure 21. OVFL Output Timing, Left-Justified Format ............................................. 13
Figure 22. Typical Connection Diagram ................................................................... 15
Figure 23. CS5361 Master Mode Clocking ............................................................... 17
Figure 24. CS5361 Recommended Analog Input Buffer .......................................... 18
Table 1. CS5361 Mode Control .............................................................................. 16
Table 2. CS5361 Slave Mode Clock Ratios ........................................................... 16
Table 3. CS5361 Common Master Clock Frequencies .......................................... 17
Table 4. Revision History ....................................................................................... 23
2
S Serial Audio Interface ........................................................................ 13
2
S SAI ................................................................................ 12
2
S SAI .............................................................................. 12
CS5361
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